60 lines
3.1 KiB
Plaintext
60 lines
3.1 KiB
Plaintext
set_property IOSTANDARD LVCMOS33 [get_ports port1]
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set_property PACKAGE_PIN N18 [get_ports port1]
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set_property IOSTANDARD LVCMOS33 [get_ports adc_clk]
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set_property PACKAGE_PIN K17 [get_ports adc_clk]
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set_property IOSTANDARD LVCMOS33 [get_ports clk_out1]
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set_property IOSTANDARD LVCMOS33 [get_ports ENET0_GMII_RX_CLK_0]
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set_property IOSTANDARD LVCMOS33 [get_ports ENET0_GMII_TX_CLK_0]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet0_gmii_rxd[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet0_gmii_rxd[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet0_gmii_rxd[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet0_gmii_rxd[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {ENET0_GMII_TX_EN_0[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet_gmii_txd[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet_gmii_txd[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet_gmii_txd[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {enet_gmii_txd[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports ENET0_GMII_RX_DV_0]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[6]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[5]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[4]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[3]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[2]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[1]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[0]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {adc_input_0[7]}]
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set_property IOSTANDARD LVCMOS33 [get_ports {axi_done}]
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set_property PACKAGE_PIN D20 [get_ports {adc_input_0[6]}]
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set_property PACKAGE_PIN H17 [get_ports {adc_input_0[5]}]
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set_property PACKAGE_PIN C20 [get_ports {adc_input_0[4]}]
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set_property PACKAGE_PIN B20 [get_ports {adc_input_0[3]}]
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set_property PACKAGE_PIN B19 [get_ports {adc_input_0[2]}]
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set_property PACKAGE_PIN H16 [get_ports {adc_input_0[1]}]
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set_property PACKAGE_PIN A20 [get_ports {adc_input_0[0]}]
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set_property PACKAGE_PIN D18 [get_ports {adc_input_0[7]}]
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set_property PACKAGE_PIN K17 [get_ports clk_out1]
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set_property PACKAGE_PIN U14 [get_ports ENET0_GMII_RX_CLK_0]
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set_property PACKAGE_PIN U15 [get_ports ENET0_GMII_TX_CLK_0]
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set_property PACKAGE_PIN Y17 [get_ports {enet0_gmii_rxd[3]}]
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set_property PACKAGE_PIN V17 [get_ports {enet0_gmii_rxd[2]}]
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set_property PACKAGE_PIN V16 [get_ports {enet0_gmii_rxd[1]}]
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set_property PACKAGE_PIN Y16 [get_ports {enet0_gmii_rxd[0]}]
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set_property PACKAGE_PIN W19 [get_ports {ENET0_GMII_TX_EN_0[0]}]
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set_property PACKAGE_PIN Y19 [get_ports {enet_gmii_txd[3]}]
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set_property PACKAGE_PIN V18 [get_ports {enet_gmii_txd[2]}]
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set_property PACKAGE_PIN Y18 [get_ports {enet_gmii_txd[1]}]
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set_property PACKAGE_PIN W18 [get_ports {enet_gmii_txd[0]}]
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set_property PACKAGE_PIN W16 [get_ports ENET0_GMII_RX_DV_0]
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set_property PACKAGE_PIN H20 [get_ports {axi_done}]
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set_property IOSTANDARD LVCMOS33 [get_ports MDIO_ETHERNET_0_0_mdc]
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set_property IOSTANDARD LVCMOS33 [get_ports MDIO_ETHERNET_0_0_mdio_io]
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set_property PACKAGE_PIN W15 [get_ports MDIO_ETHERNET_0_0_mdc]
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set_property PACKAGE_PIN Y14 [get_ports MDIO_ETHERNET_0_0_mdio_io]
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