From a8d74f5e3a0dbc3e57640c57d1843f01ef8b2fd0 Mon Sep 17 00:00:00 2001
From: Gaurav Singh <gauravsingh@circuitvalley.com>
Date: Sun, 19 Jan 2020 15:38:00 +0100
Subject: [PATCH] Update mipi_dsi_bridge.v

---
 FPGA/Soruce/mipi_dsi_bridge.v | 2 --
 1 file changed, 2 deletions(-)

diff --git a/FPGA/Soruce/mipi_dsi_bridge.v b/FPGA/Soruce/mipi_dsi_bridge.v
index 0ae9a38..b53e1e0 100644
--- a/FPGA/Soruce/mipi_dsi_bridge.v
+++ b/FPGA/Soruce/mipi_dsi_bridge.v
@@ -27,7 +27,6 @@ module mipi_dsi_bridge(nsys_reset, clk,
 				reg_3v0_en, 
 				lcd_rst, 
 				bl_en, 
-				spi_miso_o, 
 				spi_mosi_i, 
 				spi_csn_i, 
 				spi_clk_i, 
@@ -37,7 +36,6 @@ output reg reg_1v8_en;
 output reg reg_3v0_en;
 output reg lcd_rst;
 output reg bl_en;
-output spi_miso_o;
 output hs_clock_o;
 output hs_data_o;
 output wire buf_clkout_lp_n_o ;