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Update tb_spi_bridge.v

master
Gaurav Singh 2020-01-19 16:05:33 +01:00 committed by GitHub
parent 0dc35dddd3
commit aa849ffd14
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1 changed files with 1 additions and 1 deletions
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FPGA/Test_bench/tb_spi_bridge.v
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@ -130,7 +130,7 @@ task send_frame;
send_line(8'h3F, dummy); send_line(8'h3F, dummy);
for ( i= 9'h0; i<239; i = i + 1'h1)begin for ( i= 9'h0; i<239; i = i + 1'h1)begin
#1000 #1000
send_line_short(8'h6B, dummy); send_line(8'h6B, dummy);
end end