version 3.0
panhongyang0
parent
60d377336d
commit
67e5c7067b
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/* phyLS: powerful heightened yielded Logic Synthesis
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* Copyright (C) 2022 */
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/**
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* @file cec.hpp
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*
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* @brief performs combinational equivalence checking
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*
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* @author Homyoung
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* @since 2022/12/14
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*/
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#ifndef CEC_HPP
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#define CEC_HPP
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#include <mockturtle/algorithms/equivalence_checking.hpp>
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#include <mockturtle/algorithms/miter.hpp>
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#include <mockturtle/networks/aig.hpp>
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#include <mockturtle/networks/xag.hpp>
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#include <vector>
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using namespace std;
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using namespace mockturtle;
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namespace alice {
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class cec_command : public command {
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public:
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explicit cec_command(const environment::ptr& env)
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: command(env, "combinational equivalence checking for AIG network") {
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add_option("file_1, -a", filename_1, "the input file name");
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add_option("file_2, -b", filename_2, "the input file name");
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add_flag("--verbose, -v", "print the information");
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}
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protected:
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void execute() {
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clock_t begin, end;
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double totalTime;
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begin = clock();
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aig_network aig1, aig2;
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if ((lorina::read_aiger(filename_1, mockturtle::aiger_reader(aig1)) ==
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lorina::return_code::success) &&
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(lorina::read_aiger(filename_2, mockturtle::aiger_reader(aig2)) ==
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lorina::return_code::success)) {
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if (aig1.num_pis() != aig2.num_pis())
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std::cerr << "Networks have different number of primary inputs."
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<< std::endl
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<< "Miter computation has failed." << std::endl;
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else {
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const auto miter_ntk = *miter<aig_network>(aig1, aig2);
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equivalence_checking_stats st;
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const auto result = equivalence_checking(miter_ntk, {}, &st);
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if (result)
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std::cout << "Networks are equivalent." << std::endl;
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else
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std::cout << "Networks are NOT EQUIVALENT." << std::endl;
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}
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} else {
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std::cerr << "[w] parse error" << std::endl;
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}
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end = clock();
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totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
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cout.setf(ios::fixed);
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cout << "[CPU time] " << setprecision(2) << totalTime << " s" << endl;
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}
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private:
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string filename_1;
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string filename_2;
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};
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ALICE_ADD_COMMAND(cec, "Verification")
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} // namespace alice
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#endif
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/* phyLS: powerful heightened yielded Logic Synthesis
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* Copyright (C) 2022 */
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/**
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* @file convert_graph.hpp
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*
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* @brief performs decomposable function for resynthesis graph
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*
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* @author Homyoung
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* @since 2022/12/20
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*/
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#ifndef CONVERT_GRAPH_HPP
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#define CONVERT_GRAPH_HPP
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#include <iostream>
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#include <mockturtle/algorithms/klut_to_graph.hpp>
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using namespace std;
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using namespace mockturtle;
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namespace alice {
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class create_graph_command : public command {
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public:
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explicit create_graph_command(const environment::ptr& env)
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: command(env, "functional reduction : using AIG as default") {
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add_option("-e,--expression", expression,
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"creates new graph from expression");
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add_flag("--mig, -m", "functional reduction for MIG");
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add_flag("--xag, -g", "functional reduction for XAG");
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add_flag("--xmg, -x", "functional reduction for XMG");
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add_flag("--verbose, -v", "print the information");
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}
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protected:
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void execute() {
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clock_t begin, end;
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double totalTime;
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begin = clock();
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auto& opt_ntks = store<optimum_network>();
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if (opt_ntks.empty()) opt_ntks.extend();
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uint32_t num_vars{0u};
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for (auto c : expression) {
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if (c >= 'a' && c <= 'p')
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num_vars = std::max<uint32_t>(num_vars, c - 'a' + 1u);
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}
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kitty::dynamic_truth_table tt(num_vars);
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kitty::create_from_expression(tt, expression);
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klut_network kLUT_ntk;
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vector<klut_network::signal> children;
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for (auto i = 0; i < num_vars; i++) {
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const auto x = kLUT_ntk.create_pi();
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children.push_back(x);
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}
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auto fn = [&](kitty::dynamic_truth_table const& remainder,
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std::vector<klut_network::signal> const& children) {
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return kLUT_ntk.create_node(children, remainder);
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};
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kLUT_ntk.create_po(dsd_decomposition(kLUT_ntk, tt, children, fn));
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if (is_set("mig")) {
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auto mig = convert_klut_to_graph<mig_network>(kLUT_ntk);
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phyLS::print_stats(mig);
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store<mig_network>().extend();
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store<mig_network>().current() = mig;
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} else if (is_set("xmg")) {
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auto xmg = convert_klut_to_graph<xmg_network>(kLUT_ntk);
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phyLS::print_stats(xmg);
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store<xmg_network>().extend();
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store<xmg_network>().current() = xmg;
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} else if (is_set("xag")) {
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auto xag = convert_klut_to_graph<xag_network>(kLUT_ntk);
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phyLS::print_stats(xag);
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store<xag_network>().extend();
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store<xag_network>().current() = xag;
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} else {
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auto aig = convert_klut_to_graph<aig_network>(kLUT_ntk);
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phyLS::print_stats(aig);
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store<aig_network>().extend();
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store<aig_network>().current() = aig;
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}
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end = clock();
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totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
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cout.setf(ios::fixed);
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cout << "[CPU time] " << setprecision(2) << totalTime << " s" << endl;
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}
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private:
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string expression = "";
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};
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ALICE_ADD_COMMAND(create_graph, "Logic synthesis")
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} // namespace alice
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#endif
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@ -0,0 +1,89 @@
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/* phyLS: powerful heightened yielded Logic Synthesis
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* Copyright (C) 2022 */
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/**
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* @file functional_reduction.hpp
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*
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* @brief performs functional reduction
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*
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* @author Homyoung
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* @since 2022/12/20
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*/
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#ifndef FUCNTIONAL_REDUCTION_HPP
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#define FUCNTIONAL_REDUCTION_HPP
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#include <kitty/static_truth_table.hpp>
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#include <mockturtle/algorithms/cleanup.hpp>
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#include <mockturtle/algorithms/functional_reduction.hpp>
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#include <mockturtle/algorithms/simulation.hpp>
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#include <mockturtle/networks/aig.hpp>
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#include <mockturtle/networks/mig.hpp>
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#include <mockturtle/networks/xag.hpp>
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#include <mockturtle/networks/xmg.hpp>
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using namespace std;
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using namespace mockturtle;
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namespace alice {
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class reduction_command : public command {
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public:
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explicit reduction_command(const environment::ptr& env)
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: command(env, "functional reduction : using AIG as default") {
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add_flag("--mig, -m", "functional reduction for MIG");
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add_flag("--xag, -g", "functional reduction for XAG");
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add_flag("--xmg, -x", "functional reduction for XMG");
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add_flag("--verbose, -v", "print the information");
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}
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protected:
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void execute() {
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clock_t begin, end;
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double totalTime;
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begin = clock();
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if (is_set("mig")) {
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auto mig = store<mig_network>().current();
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functional_reduction(mig);
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mig = cleanup_dangling(mig);
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phyLS::print_stats(mig);
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store<mig_network>().extend();
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store<mig_network>().current() = mig;
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} else if (is_set("xmg")) {
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auto xmg = store<xmg_network>().current();
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functional_reduction(xmg);
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xmg = cleanup_dangling(xmg);
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phyLS::print_stats(xmg);
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store<xmg_network>().extend();
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store<xmg_network>().current() = xmg;
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} else if (is_set("xag")) {
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auto xag = store<xag_network>().current();
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functional_reduction(xag);
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xag = cleanup_dangling(xag);
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phyLS::print_stats(xag);
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store<xag_network>().extend();
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store<xag_network>().current() = xag;
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} else {
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auto aig = store<aig_network>().current();
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functional_reduction(aig);
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aig = cleanup_dangling(aig);
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phyLS::print_stats(aig);
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store<aig_network>().extend();
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store<aig_network>().current() = aig;
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}
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end = clock();
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totalTime = (double)(end - begin) / CLOCKS_PER_SEC;
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cout.setf(ios::fixed);
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cout << "[CPU time] " << setprecision(2) << totalTime << " s" << endl;
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}
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private:
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};
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ALICE_ADD_COMMAND(reduction, "Logic synthesis")
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} // namespace alice
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#endif
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@ -36,5 +36,8 @@
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#include "commands/write_dot.hpp"
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#include "commands/refactor.hpp"
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#include "commands/cut_rewriting.hpp"
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#include "commands/cec.hpp"
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#include "commands/functional_reduction.hpp"
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#include "commands/convert_graph.hpp"
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ALICE_MAIN(phyLS)
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