From b079f590953fddb8b2461bd374ac798bf48038c7 Mon Sep 17 00:00:00 2001 From: panjiaxiang7 Date: Wed, 26 Jul 2023 14:48:37 +0800 Subject: [PATCH] add stp-based full simulation to get the truth table --- src/commands/simulator.hpp | 7 ++- src/core/simulator/simulator.cpp | 103 +++++++++++++++++++++++++++---- src/core/simulator/simulator.hpp | 2 + 3 files changed, 98 insertions(+), 14 deletions(-) diff --git a/src/commands/simulator.hpp b/src/commands/simulator.hpp index 653f2e1..6c54171 100644 --- a/src/commands/simulator.hpp +++ b/src/commands/simulator.hpp @@ -28,6 +28,7 @@ class simulator_command : public command { : command(env, "STP-based logic network simulation") { add_option("filename,-f", filename, "name of input file"); add_flag("--verbose, -v", "verbose output"); + add_flag("--full_simulation, -t", "full simulation to get the truth table"); } protected: @@ -48,7 +49,11 @@ class simulator_command : public command { begin = clock(); - sim.simulate(); + if(is_set("full_simulation")){ + sim.full_simulate(); + }else{ + sim.simulate(); + } end = clock(); totalTime = (double)(end - begin) / CLOCKS_PER_SEC; diff --git a/src/core/simulator/simulator.cpp b/src/core/simulator/simulator.cpp index 8b01f91..4531095 100644 --- a/src/core/simulator/simulator.cpp +++ b/src/core/simulator/simulator.cpp @@ -1,8 +1,9 @@ #include "simulator.hpp" +#include namespace phyLS { simulator::simulator(CircuitGraph& graph) : graph(graph) { - pattern_num = 10000; // 随机产生10000个仿真向量 + pattern_num = 100; // 随机产生100个仿真向量 // max_branch = int( log2(pattern_num) ); //做cut的界 max_branch = 8; sim_info.resize(graph.get_lines().size()); // 按照lines的id记录仿真向量的信息 @@ -16,6 +17,34 @@ simulator::simulator(CircuitGraph& graph) : graph(graph) { } } +std::vector> simulator::generateBinary(int n)//generate n bit binary +{ + std::vector> nbitBinary;//store n bit binary + for(int i = 0;i < (1 << n); i++) + { + std::string s = ""; + for (int j = 0; j < n; j++) + { + if (i & (1 << j)) + { + s += "1"; + } + else + { + s += "0"; + } + } + reverse(s.begin(), s.end()); + std::vector vec;//single n bit binary + for(auto c : s) + { + vec.push_back(std::stoi(std::string(1,c)));//stoi (string to int) + } + nbitBinary.push_back(vec); + } + return nbitBinary; +} + bool simulator::simulate() { // 1: 给电路划分层级 graph.match_logic_depth(); @@ -28,6 +57,54 @@ bool simulator::simulate() { return true; } +bool simulator::full_simulate() { + std::vector> nbitBinary = generateBinary(graph.get_inputs().size()); + pattern_num = nbitBinary.size(); + for (const line_idx& line_id : graph.get_inputs()) + { + sim_info[line_id].resize(pattern_num); + lines_flag[line_id] = true; + for (int i = 0; i < pattern_num; i++) + { + sim_info[line_id][i] = nbitBinary[i][line_id];//生成全仿真的真值表 + } + } + graph.match_logic_depth(); + need_sim_nodes nodes = get_need_nodes(); + for (const auto& node : nodes) { + single_node_sim(node); + } + //get the truth table + int po0_index = graph.get_inputs().size(); + int pon_index = po0_index + graph.get_outputs().size() - 1; + std::vector> outputs_tt; + //std::vector> nbitBinary = generateBinary(graph.get_inputs().size()); + for(int i = po0_index;i <= pon_index; i++) + { + std::vector int_vector(sim_info[i].begin(), sim_info[i].end()); + outputs_tt.push_back(int_vector); + std::reverse(outputs_tt[i - po0_index].begin(), outputs_tt[i - po0_index].end()); + } + + std::vector hex_strings; + for(const auto& binary_vector : outputs_tt) + { + std::stringstream hex_stream; + + for (int i = 0; i < binary_vector.size(); i += 4) + { + int sum = binary_vector[i] * 8 + binary_vector[i+1] * 4 + binary_vector[i+2] * 2 + binary_vector[i+3]; + hex_stream << std::hex << sum; + } + hex_strings.push_back(hex_stream.str()); + } + for(int i = 0;i < graph.get_outputs().size(); i++) + { + std::cout << "turth table of po" << i << " is: 0x" << hex_strings[i] << std::endl; + } + return true; +} + need_sim_nodes simulator::get_need_nodes() { need_sim_nodes nodes; for (const auto& nodes_id : graph.get_m_node_level()) { @@ -138,26 +215,26 @@ void simulator::get_node_matrix(const gate_idx node_id, m_chain& mc, void simulator::print_simulation_result() { std::cout << "PI/PO : " << graph.get_inputs().size() << "/" - << graph.get_outputs().size() << std::endl - << "result size = " << sim_info.size() << std::endl; + << graph.get_outputs().size() << std::endl; + for (const auto& input_id : graph.get_inputs()) { + std::cout << graph.get_lines()[input_id].name << " "; + } + std::cout << ": "; + for (const auto& output_id : graph.get_outputs()) { + std::cout << graph.get_lines()[output_id].name << " "; + } + std::cout << std::endl; for (int i = 0; i < pattern_num; i++) { - std::cout << "Pattern " << i + 1 << " : "; for (const auto& input_id : graph.get_inputs()) { - std::cout << sim_info[input_id][i]; + std::cout << sim_info[input_id][i] << " "; } - std::cout << " = "; + std::cout << ": "; for (const auto& output_id : graph.get_outputs()) { - std::cout << sim_info[output_id][i]; + std::cout << sim_info[output_id][i] << " "; } std::cout << std::endl; - std::cout << "random node result : " << sim_info[100][i] << std::endl; } -// for (const auto& input_id : graph.get_inputs()) -// std::cout << graph.get_lines()[input_id].name << " "; -// std::cout << ": "; -// for (const auto& output_id : graph.get_outputs()) -// std::cout << graph.get_lines()[output_id].name << " "; } bool simulator::check_sim_info() { diff --git a/src/core/simulator/simulator.hpp b/src/core/simulator/simulator.hpp index f675e51..aeaa3fa 100644 --- a/src/core/simulator/simulator.hpp +++ b/src/core/simulator/simulator.hpp @@ -20,6 +20,8 @@ class simulator { public: simulator(CircuitGraph& graph); bool simulate(); // simulate + bool full_simulate(); //full_simulate + std::vector> generateBinary(int n); void print_simulation_result(); private: