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pluto_hdl_adi/library/axi_laser_driver/Makefile

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axi_laser_driver: Initial commit The laser driver contains the axi_pulse_gen's IP and an additional register map which controls/monitor the laser driver enable control line and the over temperature warning line (OTW). It also contains an interrupt logic, which allows to generate an interrupt in function of the generated pulse or incoming OTW signal. The IPs register maps looks as follow: 0x00 - axi_pulse_gen register map 0x80 - axi_laser_driver register map 0x80 - DRIVER_ENABLE 0x84 - DRIVER_OTW 0x88 - EXT_CLK_COUNTER 0xA0 - IRQ_MASK 0xA4 - IRQ_SOURCE 0xA8 - IRQ_PENDING 0xAC - SEQUENCER_CONTROL 0 - SEQUENCER_ENABLE 1 - AUTO_SEQUENCER_ENABLED 0xB0 - SEQUENCER_SYNC_OFFSET 0xB4 - AUTO_SEQUENCE [ 1: 0] - CHANNEL_SEL_0 [ 5: 4] - CHANNEL_SEL_1 [ 9: 8] - CHANNEL_SEL_2 [13:12] - CHANNEL_SEL_3 0xB8 - MANUAL_SEQUENCE [ 1: 0] - MANUAL_CHANNEL_SEL Current interrupt sources scheme is: - bit 0 : pulse (triggered by the level of the pulse) - bit 1 : OTW_N enter (triggered by positive edge of the OTW_N) - bit 2 : OTW_N exit (triggered by the level of the pulse) Generate a reset signal before the pulse which can be used to reset various IP's of the data path (eg. pack/cpack). This can help to clear out the internal buffers and registers of these IP, starting clean at the moment when the actual pulse arrives. The sequencer has an auto and a manual mode, and can be set to custom sequences of the TIA channel selection lines sate. The sequencer in auto mode is synchronized to the pulse, it will change its state before a generated pulse which will drive the lasers. The offset between the sequencer beat and the laser driver pulse can be modified through an AXI register.
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####################################################################################
library & projects: Update Makefiles Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-01-18 13:15:22 +00:00
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
Makefiles: Update header with the appropriate license
2021-09-15 15:03:11 +00:00
### SPDX short identifier: BSD-1-Clause
axi_laser_driver: Initial commit The laser driver contains the axi_pulse_gen's IP and an additional register map which controls/monitor the laser driver enable control line and the over temperature warning line (OTW). It also contains an interrupt logic, which allows to generate an interrupt in function of the generated pulse or incoming OTW signal. The IPs register maps looks as follow: 0x00 - axi_pulse_gen register map 0x80 - axi_laser_driver register map 0x80 - DRIVER_ENABLE 0x84 - DRIVER_OTW 0x88 - EXT_CLK_COUNTER 0xA0 - IRQ_MASK 0xA4 - IRQ_SOURCE 0xA8 - IRQ_PENDING 0xAC - SEQUENCER_CONTROL 0 - SEQUENCER_ENABLE 1 - AUTO_SEQUENCER_ENABLED 0xB0 - SEQUENCER_SYNC_OFFSET 0xB4 - AUTO_SEQUENCE [ 1: 0] - CHANNEL_SEL_0 [ 5: 4] - CHANNEL_SEL_1 [ 9: 8] - CHANNEL_SEL_2 [13:12] - CHANNEL_SEL_3 0xB8 - MANUAL_SEQUENCE [ 1: 0] - MANUAL_CHANNEL_SEL Current interrupt sources scheme is: - bit 0 : pulse (triggered by the level of the pulse) - bit 1 : OTW_N enter (triggered by positive edge of the OTW_N) - bit 2 : OTW_N exit (triggered by the level of the pulse) Generate a reset signal before the pulse which can be used to reset various IP's of the data path (eg. pack/cpack). This can help to clear out the internal buffers and registers of these IP, starting clean at the moment when the actual pulse arrives. The sequencer has an auto and a manual mode, and can be set to custom sequences of the TIA channel selection lines sate. The sequencer in auto mode is synchronized to the pulse, it will change its state before a generated pulse which will drive the lasers. The offset between the sequencer beat and the laser driver pulse can be modified through an AXI register.
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## Auto-generated, do not modify!
####################################################################################
LIBRARY_NAME := axi_laser_driver
GENERIC_DEPS += ../common/up_clock_mon.v
GENERIC_DEPS += axi_laser_driver.v
GENERIC_DEPS += axi_laser_driver_regmap.v
makefile: Update makefiles
2020-04-29 10:30:01 +00:00
XILINX_DEPS += ../xilinx/common/up_clock_mon_constr.xdc
axi_laser_driver: Initial commit The laser driver contains the axi_pulse_gen's IP and an additional register map which controls/monitor the laser driver enable control line and the over temperature warning line (OTW). It also contains an interrupt logic, which allows to generate an interrupt in function of the generated pulse or incoming OTW signal. The IPs register maps looks as follow: 0x00 - axi_pulse_gen register map 0x80 - axi_laser_driver register map 0x80 - DRIVER_ENABLE 0x84 - DRIVER_OTW 0x88 - EXT_CLK_COUNTER 0xA0 - IRQ_MASK 0xA4 - IRQ_SOURCE 0xA8 - IRQ_PENDING 0xAC - SEQUENCER_CONTROL 0 - SEQUENCER_ENABLE 1 - AUTO_SEQUENCER_ENABLED 0xB0 - SEQUENCER_SYNC_OFFSET 0xB4 - AUTO_SEQUENCE [ 1: 0] - CHANNEL_SEL_0 [ 5: 4] - CHANNEL_SEL_1 [ 9: 8] - CHANNEL_SEL_2 [13:12] - CHANNEL_SEL_3 0xB8 - MANUAL_SEQUENCE [ 1: 0] - MANUAL_CHANNEL_SEL Current interrupt sources scheme is: - bit 0 : pulse (triggered by the level of the pulse) - bit 1 : OTW_N enter (triggered by positive edge of the OTW_N) - bit 2 : OTW_N exit (triggered by the level of the pulse) Generate a reset signal before the pulse which can be used to reset various IP's of the data path (eg. pack/cpack). This can help to clear out the internal buffers and registers of these IP, starting clean at the moment when the actual pulse arrives. The sequencer has an auto and a manual mode, and can be set to custom sequences of the TIA channel selection lines sate. The sequencer in auto mode is synchronized to the pulse, it will change its state before a generated pulse which will drive the lasers. The offset between the sequencer beat and the laser driver pulse can be modified through an AXI register.
2019-03-19 12:05:14 +00:00
XILINX_DEPS += axi_laser_driver_constr.xdc
XILINX_DEPS += axi_laser_driver_ip.tcl
XILINX_LIB_DEPS += axi_pulse_gen
XILINX_LIB_DEPS += util_cdc
makefile: Update makefiles
2020-04-29 10:30:01 +00:00
INTEL_DEPS += ../axi_pulse_gen/axi_pulse_gen_constr.sdc
INTEL_DEPS += ../axi_pulse_gen/axi_pulse_gen_regmap.v
INTEL_DEPS += ../common/ad_rst.v
INTEL_DEPS += ../common/up_axi.v
INTEL_DEPS += ../common/util_pulse_gen.v
INTEL_DEPS += ../util_cdc/sync_bits.v
INTEL_DEPS += ../util_cdc/sync_event.v
INTEL_DEPS += axi_laser_driver_constr.sdc
INTEL_DEPS += axi_laser_driver_hw.tcl
axi_laser_driver: Initial commit The laser driver contains the axi_pulse_gen's IP and an additional register map which controls/monitor the laser driver enable control line and the over temperature warning line (OTW). It also contains an interrupt logic, which allows to generate an interrupt in function of the generated pulse or incoming OTW signal. The IPs register maps looks as follow: 0x00 - axi_pulse_gen register map 0x80 - axi_laser_driver register map 0x80 - DRIVER_ENABLE 0x84 - DRIVER_OTW 0x88 - EXT_CLK_COUNTER 0xA0 - IRQ_MASK 0xA4 - IRQ_SOURCE 0xA8 - IRQ_PENDING 0xAC - SEQUENCER_CONTROL 0 - SEQUENCER_ENABLE 1 - AUTO_SEQUENCER_ENABLED 0xB0 - SEQUENCER_SYNC_OFFSET 0xB4 - AUTO_SEQUENCE [ 1: 0] - CHANNEL_SEL_0 [ 5: 4] - CHANNEL_SEL_1 [ 9: 8] - CHANNEL_SEL_2 [13:12] - CHANNEL_SEL_3 0xB8 - MANUAL_SEQUENCE [ 1: 0] - MANUAL_CHANNEL_SEL Current interrupt sources scheme is: - bit 0 : pulse (triggered by the level of the pulse) - bit 1 : OTW_N enter (triggered by positive edge of the OTW_N) - bit 2 : OTW_N exit (triggered by the level of the pulse) Generate a reset signal before the pulse which can be used to reset various IP's of the data path (eg. pack/cpack). This can help to clear out the internal buffers and registers of these IP, starting clean at the moment when the actual pulse arrives. The sequencer has an auto and a manual mode, and can be set to custom sequences of the TIA channel selection lines sate. The sequencer in auto mode is synchronized to the pulse, it will change its state before a generated pulse which will drive the lasers. The offset between the sequencer beat and the laser driver pulse can be modified through an AXI register.
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include ../scripts/library.mk