73 lines
5.2 KiB
Plaintext
73 lines
5.2 KiB
Plaintext
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FMC_pin FMC_port Schematic_name System_top_name IOSTANDARD Termination
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# ad9361 master
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D20 LA17_CC_P REF_CLK_FMC_P ref_clk_p LVDS DIFF_TERM TRUE
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D21 LA17_CC_N REF_CLK_FMC_N ref_clk_n LVDS DIFF_TERM TRUE
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G6 LA00_CC_P DATA_CLK_P_A rx_clk_in_0_p LVDS DIFF_TERM TRUE
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G7 LA00_CC_N DATA_CLK_N_A rx_clk_in_0_n LVDS DIFF_TERM TRUE
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D8 LA01_CC_P RX_FRAME_P_A rx_frame_in_0_p LVDS DIFF_TERM TRUE
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D9 LA01_CC_N RX_FRAME_N_A rx_frame_in_0_n LVDS DIFF_TERM TRUE
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G12 LA08_P FB_CLK_P_A tx_clk_out_0_p LVDS #N/A
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G13 LA08_N FB_CLK_N_A tx_clk_out_0_n LVDS #N/A
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D14 LA09_P TX_FRAME_P_A tx_frame_out_0_p LVDS #N/A
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D15 LA09_N TX_FRAME_N_A tx_frame_out_0_n LVDS #N/A
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H7 LA02_P RX_D0_P_A rx_data_in_0_p[0] LVDS DIFF_TERM TRUE
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H8 LA02_N RX_D0_N_A rx_data_in_0_n[0] LVDS DIFF_TERM TRUE
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G9 LA03_P RX_D1_P_A rx_data_in_0_p[1] LVDS DIFF_TERM TRUE
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G10 LA03_N RX_D1_N_A rx_data_in_0_n[1] LVDS DIFF_TERM TRUE
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H10 LA04_P RX_D2_P_A rx_data_in_0_p[2] LVDS DIFF_TERM TRUE
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H11 LA04_N RX_D2_N_A rx_data_in_0_n[2] LVDS DIFF_TERM TRUE
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D11 LA05_P RX_D3_P_A rx_data_in_0_p[3] LVDS DIFF_TERM TRUE
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D12 LA05_N RX_D3_N_A rx_data_in_0_n[3] LVDS DIFF_TERM TRUE
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C10 LA06_P RX_D4_P_A rx_data_in_0_p[4] LVDS DIFF_TERM TRUE
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C11 LA06_N RX_D4_N_A rx_data_in_0_n[4] LVDS DIFF_TERM TRUE
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H13 LA07_P RX_D5_P_A rx_data_in_0_p[5] LVDS DIFF_TERM TRUE
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H14 LA07_N RX_D5_N_A rx_data_in_0_n[5] LVDS DIFF_TERM TRUE
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C14 LA10_P TX_D0_P_A tx_data_out_0_p[0] LVDS #N/A
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C15 LA10_N TX_D0_N_A tx_data_out_0_n[0] LVDS #N/A
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H16 LA11_P TX_D1_P_A tx_data_out_0_p[1] LVDS #N/A
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H17 LA11_N TX_D1_N_A tx_data_out_0_n[1] LVDS #N/A
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G15 LA12_P TX_D2_P_A tx_data_out_0_p[2] LVDS #N/A
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G16 LA12_N TX_D2_N_A tx_data_out_0_n[2] LVDS #N/A
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D17 LA13_P TX_D3_P_A tx_data_out_0_p[3] LVDS #N/A
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D18 LA13_N TX_D3_N_A tx_data_out_0_n[3] LVDS #N/A
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C18 LA14_P TX_D4_P_A tx_data_out_0_p[4] LVDS #N/A
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C19 LA14_N TX_D4_N_A tx_data_out_0_n[4] LVDS #N/A
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H19 LA15_P TX_D5_P_A tx_data_out_0_p[5] LVDS #N/A
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H20 LA15_N TX_D5_N_A tx_data_out_0_n[5] LVDS #N/A
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C22 LA18_CC_P SYNC_IN mcs_sync LVCMOS18 #N/A
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G18 LA16_P ENABLE_A enable_0 LVCMOS18 #N/A
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G19 LA16_N TXNRX_A txnrx_0 LVCMOS18 #N/A
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H22 LA19_P CTRL_OUT0_A gpio_status_0[0] LVCMOS18 #N/A
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H23 LA19_N CTRL_OUT1_A gpio_status_0[1] LVCMOS18 #N/A
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G21 LA20_P CTRL_OUT2_A gpio_status_0[2] LVCMOS18 #N/A
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G22 LA20_N CTRL_OUT3_A gpio_status_0[3] LVCMOS18 #N/A
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H25 LA21_P CTRL_OUT4_A gpio_status_0[4] LVCMOS18 #N/A
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H26 LA21_N CTRL_OUT5_A gpio_status_0[5] LVCMOS18 #N/A
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G24 LA22_P CTRL_OUT6_A gpio_status_0[6] LVCMOS18 #N/A
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G25 LA22_N CTRL_OUT7_A gpio_status_0[7] LVCMOS18 #N/A
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D23 LA23_P CTRL_IN0_A gpio_ctl_0[0] LVCMOS18 #N/A
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D24 LA23_N CTRL_IN1_A gpio_ctl_0[1] LVCMOS18 #N/A
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H28 LA24_P CTRL_IN2_A gpio_ctl_0[2] LVCMOS18 #N/A
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H29 LA24_N CTRL_IN3_A gpio_ctl_0[3] LVCMOS18 #N/A
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G27 LA25_P EN_AGC_A gpio_en_agc_0 LVCMOS18 #N/A
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C23 LA18_CC_N RESET_A gpio_resetb_0 LVCMOS18 #N/A
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C26 LA27_P DEBUG_1 gpio_debug_1_0 LVCMOS18 #N/A
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C27 LA27_N DEBUG_2 gpio_debug_2_0 LVCMOS18 #N/A
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D26 LA26_P CAL_SW_1 gpio_calsw_1_0 LVCMOS18 #N/A
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D27 LA26_N CAL_SW_2 gpio_calsw_2_0 LVCMOS18 #N/A
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H31 LA28_P 5355_RF_EN gpio_ad5355_rfen LVCMOS18 #N/A
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H37 LA32_P 5355_LOCK gpio_ad5355_lock LVCMOS18 #N/A
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# spi
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G30 LA29_P SPI_ENB_A spi_ad9361_0 LVCMOS18 PULLTYPE PULLUP
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G31 LA29_N SPI_ENB_B spi_ad9361_1 LVCMOS18 PULLTYPE PULLUP
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H34 LA30_P 5355_LE spi_ad5355 LVCMOS18 PULLTYPE PULLUP
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H35 LA30_N SPI_CLK spi_clk LVCMOS18 #N/A
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G33 LA31_P SPI_DI spi_mosi LVCMOS18 #N/A
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G34 LA31_N SPI_DO spi_miso LVCMOS18 #N/A
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