2014-04-09 14:34:40 +00:00
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# ip
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source ../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip.tcl
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2019-03-14 15:25:36 +00:00
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adi_init_bd_tcl
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2014-04-09 14:34:40 +00:00
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adi_ip_create axi_ad9467
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adi_ip_files axi_ad9467 [list \
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2014-07-30 19:31:09 +00:00
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"$ad_hdl_dir/library/common/ad_rst.v" \
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2017-07-26 14:31:48 +00:00
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"$ad_hdl_dir/library/xilinx/common/ad_data_clk.v" \
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"$ad_hdl_dir/library/xilinx/common/ad_data_in.v" \
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2014-07-30 19:31:09 +00:00
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"$ad_hdl_dir/library/common/ad_datafmt.v" \
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"$ad_hdl_dir/library/common/ad_pnmon.v" \
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"$ad_hdl_dir/library/common/up_xfer_status.v" \
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"$ad_hdl_dir/library/common/up_xfer_cntrl.v" \
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"$ad_hdl_dir/library/common/up_clock_mon.v" \
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"$ad_hdl_dir/library/common/up_delay_cntrl.v" \
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"$ad_hdl_dir/library/common/up_adc_common.v" \
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"$ad_hdl_dir/library/common/up_adc_channel.v" \
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"$ad_hdl_dir/library/common/up_axi.v" \
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2017-03-30 13:12:07 +00:00
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"$ad_hdl_dir/library/xilinx/common/up_xfer_cntrl_constr.xdc" \
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"$ad_hdl_dir/library/xilinx/common/ad_rst_constr.xdc" \
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"$ad_hdl_dir/library/xilinx/common/up_xfer_status_constr.xdc" \
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"$ad_hdl_dir/library/xilinx/common/up_clock_mon_constr.xdc" \
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2014-07-30 19:31:09 +00:00
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"axi_ad9467_pnmon.v" \
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"axi_ad9467_if.v" \
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"axi_ad9467_channel.v" \
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2019-01-11 08:54:16 +00:00
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"axi_ad9467.v" \
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"bd/bd.tcl" ]
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2014-04-09 14:34:40 +00:00
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adi_ip_properties axi_ad9467
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2019-03-14 15:25:36 +00:00
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adi_auto_fill_bd_tcl
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adi_ip_bd axi_ad9467 "bd/bd.tcl"
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2019-01-11 08:54:16 +00:00
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ad6676,ad9144,ad9152,ad9234,ad9250,ad9434,ad9467,ad9625,ad652,ad9671,ad9680,ad9739a:Set default driver value for overflow, underflow, gpio_in and dac_sync ports
2015-06-09 11:21:12 +00:00
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set_property driver_value 0 [ipx::get_ports *dovf* -of_objects [ipx::current_core]]
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2018-02-15 08:41:14 +00:00
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ipx::infer_bus_interface adc_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface delay_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface adc_clk_in_p xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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ipx::infer_bus_interface adc_clk_in_n xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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2019-01-11 08:54:16 +00:00
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adi_add_auto_fpga_spec_params
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ipx::create_xgui_files [ipx::current_core]
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2014-04-09 14:34:40 +00:00
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ipx::save_core [ipx::current_core]
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