2015-06-26 09:04:19 +00:00
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# create board design
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# interface ports
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr
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create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 fixed_io
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_main
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create_bd_port -dir O spi0_csn_2_o
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create_bd_port -dir O spi0_csn_1_o
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create_bd_port -dir O spi0_csn_0_o
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create_bd_port -dir I spi0_csn_i
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create_bd_port -dir I spi0_clk_i
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create_bd_port -dir O spi0_clk_o
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create_bd_port -dir I spi0_sdo_i
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create_bd_port -dir O spi0_sdo_o
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create_bd_port -dir I spi0_sdi_i
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create_bd_port -dir O spi1_csn_2_o
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create_bd_port -dir O spi1_csn_1_o
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create_bd_port -dir O spi1_csn_0_o
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create_bd_port -dir I spi1_csn_i
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create_bd_port -dir I spi1_clk_i
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create_bd_port -dir O spi1_clk_o
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create_bd_port -dir I spi1_sdo_i
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create_bd_port -dir O spi1_sdo_o
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create_bd_port -dir I spi1_sdi_i
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create_bd_port -dir I -from 63 -to 0 gpio_i
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create_bd_port -dir O -from 63 -to 0 gpio_o
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create_bd_port -dir O -from 63 -to 0 gpio_t
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# hdmi interface
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create_bd_port -dir O hdmi_out_clk
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create_bd_port -dir O hdmi_hsync
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create_bd_port -dir O hdmi_vsync
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create_bd_port -dir O hdmi_data_e
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create_bd_port -dir O -from 15 -to 0 hdmi_data
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# spdif audio
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create_bd_port -dir O spdif
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# instance: sys_ps7
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2017-04-12 15:50:42 +00:00
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ad_ip_instance processing_system7 sys_ps7
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ad_ip_parameter sys_ps7 CONFIG.PCW_IMPORT_BOARD_PRESET ZC702
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ad_ip_parameter sys_ps7 CONFIG.PCW_TTC0_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_CLK1_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_RST1_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ 100.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ 200.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_FABRIC_INTERRUPT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP0 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_INTR 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_IO 64
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_DMA0 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_SPI0_IO EMIO
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_SPI1_IO EMIO
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ad_ip_instance axi_iic axi_iic_main
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ad_ip_parameter axi_iic_main CONFIG.USE_BOARD_FLOW true
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ad_ip_parameter axi_iic_main CONFIG.IIC_BOARD_INTERFACE IIC_MAIN
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ad_ip_instance xlconcat sys_concat_intc
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ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
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ad_ip_instance proc_sys_reset sys_rstgen
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ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
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2015-06-26 09:04:19 +00:00
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# hdmi peripherals
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2017-04-12 15:50:42 +00:00
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ad_ip_instance axi_clkgen axi_hdmi_clkgen
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ad_ip_instance axi_hdmi_tx axi_hdmi_core
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2018-07-23 12:21:44 +00:00
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ad_ip_parameter axi_hdmi_core CONFIG.INTERFACE 16_BIT
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2015-06-26 09:04:19 +00:00
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2018-05-16 14:00:17 +00:00
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ad_ip_instance axi_dmac axi_hdmi_dma
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ad_ip_parameter axi_hdmi_dma CONFIG.DMA_TYPE_SRC 0
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ad_ip_parameter axi_hdmi_dma CONFIG.DMA_TYPE_DEST 1
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ad_ip_parameter axi_hdmi_dma CONFIG.CYCLIC true
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ad_ip_parameter axi_hdmi_dma CONFIG.SYNC_TRANSFER_START 0
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ad_ip_parameter axi_hdmi_dma CONFIG.AXI_SLICE_SRC 0
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ad_ip_parameter axi_hdmi_dma CONFIG.AXI_SLICE_DEST 0
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ad_ip_parameter axi_hdmi_dma CONFIG.DMA_2D_TRANSFER true
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ad_ip_parameter axi_hdmi_dma CONFIG.DMA_DATA_WIDTH_SRC 64
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2015-06-26 09:04:19 +00:00
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# audio peripherals
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2017-04-12 15:50:42 +00:00
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ad_ip_instance clk_wiz sys_audio_clkgen
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ad_ip_parameter sys_audio_clkgen CONFIG.CLKOUT1_REQUESTED_OUT_FREQ 12.288
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ad_ip_parameter sys_audio_clkgen CONFIG.USE_LOCKED false
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ad_ip_parameter sys_audio_clkgen CONFIG.USE_RESET true
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2017-04-20 15:26:02 +00:00
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ad_ip_parameter sys_audio_clkgen CONFIG.USE_PHASE_ALIGNMENT false
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2017-04-12 15:50:42 +00:00
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ad_ip_parameter sys_audio_clkgen CONFIG.RESET_TYPE ACTIVE_LOW
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2017-04-20 14:54:47 +00:00
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ad_ip_parameter sys_audio_clkgen CONFIG.PRIM_SOURCE No_buffer
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2015-06-26 09:04:19 +00:00
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2017-04-12 15:50:42 +00:00
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ad_ip_instance axi_spdif_tx axi_spdif_tx_core
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ad_ip_parameter axi_spdif_tx_core CONFIG.DMA_TYPE 1
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ad_ip_parameter axi_spdif_tx_core CONFIG.S_AXI_ADDRESS_WIDTH 16
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2015-06-26 09:04:19 +00:00
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# system reset/clock definitions
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ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0
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ad_connect sys_200m_clk sys_ps7/FCLK_CLK1
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ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
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ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
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ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
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ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
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# interface connections
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ad_connect ddr sys_ps7/DDR
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ad_connect gpio_i sys_ps7/GPIO_I
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ad_connect gpio_o sys_ps7/GPIO_O
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ad_connect gpio_t sys_ps7/GPIO_T
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ad_connect fixed_io sys_ps7/FIXED_IO
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ad_connect iic_main axi_iic_main/iic
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ad_connect sys_200m_clk axi_hdmi_clkgen/clk
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# spi connections
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ad_connect spi0_csn_2_o sys_ps7/SPI0_SS2_O
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ad_connect spi0_csn_1_o sys_ps7/SPI0_SS1_O
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ad_connect spi0_csn_0_o sys_ps7/SPI0_SS_O
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ad_connect spi0_csn_i sys_ps7/SPI0_SS_I
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ad_connect spi0_clk_i sys_ps7/SPI0_SCLK_I
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ad_connect spi0_clk_o sys_ps7/SPI0_SCLK_O
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ad_connect spi0_sdo_i sys_ps7/SPI0_MOSI_I
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ad_connect spi0_sdo_o sys_ps7/SPI0_MOSI_O
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ad_connect spi0_sdi_i sys_ps7/SPI0_MISO_I
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ad_connect spi1_csn_2_o sys_ps7/SPI1_SS2_O
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ad_connect spi1_csn_1_o sys_ps7/SPI1_SS1_O
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ad_connect spi1_csn_0_o sys_ps7/SPI1_SS_O
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ad_connect spi1_csn_i sys_ps7/SPI1_SS_I
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ad_connect spi1_clk_i sys_ps7/SPI1_SCLK_I
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ad_connect spi1_clk_o sys_ps7/SPI1_SCLK_O
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ad_connect spi1_sdo_i sys_ps7/SPI1_MOSI_I
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ad_connect spi1_sdo_o sys_ps7/SPI1_MOSI_O
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ad_connect spi1_sdi_i sys_ps7/SPI1_MISO_I
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# hdmi
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2015-08-28 17:48:01 +00:00
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ad_connect sys_cpu_clk axi_hdmi_core/vdma_clk
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2015-06-26 09:04:19 +00:00
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ad_connect axi_hdmi_core/hdmi_clk axi_hdmi_clkgen/clk_0
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ad_connect axi_hdmi_core/hdmi_out_clk hdmi_out_clk
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ad_connect axi_hdmi_core/hdmi_16_hsync hdmi_hsync
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ad_connect axi_hdmi_core/hdmi_16_vsync hdmi_vsync
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ad_connect axi_hdmi_core/hdmi_16_data_e hdmi_data_e
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ad_connect axi_hdmi_core/hdmi_16_data hdmi_data
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2018-05-16 14:00:17 +00:00
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2018-09-17 17:12:12 +00:00
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ad_connect axi_hdmi_dma/m_axis axi_hdmi_core/s_axis
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2018-05-16 14:00:17 +00:00
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ad_connect sys_cpu_resetn axi_hdmi_dma/s_axi_aresetn
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ad_connect sys_cpu_resetn axi_hdmi_dma/m_src_axi_aresetn
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ad_connect sys_cpu_clk axi_hdmi_dma/s_axi_aclk
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ad_connect sys_cpu_clk axi_hdmi_dma/m_src_axi_aclk
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ad_connect sys_cpu_clk axi_hdmi_dma/m_axis_aclk
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2015-06-26 09:04:19 +00:00
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# spdif audio
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ad_connect sys_cpu_clk axi_spdif_tx_core/DMA_REQ_ACLK
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ad_connect sys_cpu_clk sys_ps7/DMA0_ACLK
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ad_connect sys_cpu_resetn axi_spdif_tx_core/DMA_REQ_RSTN
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ad_connect sys_ps7/DMA0_REQ axi_spdif_tx_core/DMA_REQ
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ad_connect sys_ps7/DMA0_ACK axi_spdif_tx_core/DMA_ACK
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ad_connect sys_200m_clk sys_audio_clkgen/clk_in1
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2015-08-25 06:58:32 +00:00
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ad_connect sys_cpu_resetn sys_audio_clkgen/resetn
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2015-06-26 09:04:19 +00:00
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ad_connect sys_audio_clkgen/clk_out1 axi_spdif_tx_core/spdif_data_clk
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ad_connect spdif axi_spdif_tx_core/spdif_tx_o
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# match up interconnects
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ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P
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2018-05-16 14:00:17 +00:00
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ad_connect sys_concat_intc/In15 axi_hdmi_dma/irq
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2015-06-26 09:04:19 +00:00
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ad_connect sys_concat_intc/In14 axi_iic_main/iic2intc_irpt
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2018-07-20 15:15:38 +00:00
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ad_connect sys_concat_intc/In13 GND
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ad_connect sys_concat_intc/In12 GND
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ad_connect sys_concat_intc/In11 GND
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ad_connect sys_concat_intc/In10 GND
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ad_connect sys_concat_intc/In9 GND
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ad_connect sys_concat_intc/In8 GND
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ad_connect sys_concat_intc/In7 GND
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ad_connect sys_concat_intc/In6 GND
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ad_connect sys_concat_intc/In5 GND
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ad_connect sys_concat_intc/In4 GND
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ad_connect sys_concat_intc/In3 GND
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ad_connect sys_concat_intc/In2 GND
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ad_connect sys_concat_intc/In1 GND
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ad_connect sys_concat_intc/In0 GND
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2015-06-26 09:04:19 +00:00
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# address map
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ad_cpu_interconnect 0x41600000 axi_iic_main
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ad_cpu_interconnect 0x79000000 axi_hdmi_clkgen
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ad_cpu_interconnect 0x43000000 axi_hdmi_dma
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ad_cpu_interconnect 0x70e00000 axi_hdmi_core
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ad_cpu_interconnect 0x75c00000 axi_spdif_tx_core
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ad_mem_hp0_interconnect sys_cpu_clk sys_ps7/S_AXI_HP0
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2018-05-16 14:00:17 +00:00
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ad_mem_hp0_interconnect sys_cpu_clk axi_hdmi_dma/m_src_axi
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