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pluto_hdl_adi/docs/regmap/adi_regmap_adc.txt

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docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
TITLE
ADC Common (axi_ad*)
ADC_COMMON
ENDTITLE
############################################################################################
############################################################################################
REG
0x0010
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
RSTN
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
CE_N
RW
Clock enable, default is enabled(0x0). An inverse version of the signal is exported out of
the module to control clock enables
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
MMCM_RSTN
RW
MMCM reset only (required for DRP access).
Reset, default is IN-RESET (0x0), software must write 0x1 to bring up the core.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RSTN
RW
Reset, default is IN-RESET (0x0), software must write 0x1 to bring up the core.
ENDFIELD
############################################################################################
############################################################################################
REG
0x0011
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
CNTRL
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[16] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
SDR_DDR_N
RW
Interface type (1 represents SDR, 0 represents DDR)
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
SYMB_OP
RW
Select symbol data format mode (0x1)
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[14] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
SYMB_8_16B
RW
Select number of bits for symbol format mode (1 represents 8b, 0 represents 16b)
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[12:8] 0x00000000
NUM_LANES
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
Number of active lanes (1 : CSSI 1-lane, LSSI 1-lane, 2 : LSSI 2-lane, 4 : CSSI 4-lane).
For AD7768, AD7768-4 and AD777x number of active lanes : 1/2/4/8 where supported.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[3] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
SYNC
RW
Initialize synchronization between multiple ADCs
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
R1_MODE
RW
Select number of RF channels 1 (0x1) or 2 (0x0).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DDR_EDGESEL
RW
Select rising edge (0x0) or falling edge (0x1) for the first part
of a sample (if applicable) followed by the successive edges for
the remaining parts. This only controls how the sample is delineated
from the incoming data post DDR registers.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PIN_MODE
RW
Select interface pin mode to be clock multiplexed (0x1) or pin
multiplexed (0x0). In clock multiplexed mode, samples are received
on alternative clock edges. In pin multiplexed mode, samples are
interleaved or grouped on the pins at the same clock edge.
ENDFIELD
############################################################################################
############################################################################################
REG
0x0012
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
CNTRL_2
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
EXT_SYNC_ARM
RW
Setting this bit will arm the trigger mechanism sensitive to an external sync signal.
Once the external sync signal goes high it synchronizes channels within a ADC, and across multiple instances.
This bit has an effect only the EXT_SYNC synthesis parameter is set.
This bit self clears.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
EXT_SYNC_DISARM
RW
Setting this bit will disarm the trigger mechanism sensitive to an external sync signal.
This bit has an effect only the EXT_SYNC synthesis parameter is set.
This bit self clears.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[8] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
MANUAL_SYNC_REQUEST
RW
Setting this bit will issue an external sync event if it is hooked up inside the fabric.
This bit has an effect only the EXT_SYNC synthesis parameter is set.
This bit self clears.
ENDFIELD
############################################################################################
############################################################################################
REG
0x0013
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
CNTRL_3
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[8] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
CRC_EN
RW
Setting this bit will enable the CRC generation.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[7:0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
CUSTOM_CONTROL
RW
Select output format decode mode.(for ADAQ8092: bit 0 - enables digital output randomizer decode
, bit 1 - enables alternate bit polarity decode).
ENDFIELD
############################################################################################
############################################################################################
REG
0x0015
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
CLK_FREQ
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:0] 0x00000000
CLK_FREQ
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
Interface clock frequency. This is relative to the processor clock and in many cases is
100MHz. The number is represented as unsigned 16.16 format. Assuming a 100MHz processor
clock the minimum is 1.523kHz and maximum is 6.554THz. The actual interface clock
is CLK_FREQ * CLK_RATIO (see below). Note that the actual sampling clock may not be
the same as the interface clock- software must consider device specific implementation
parameters to calculate the final sampling clock.
ENDFIELD
############################################################################################
############################################################################################
REG
0x0016
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
CLK_RATIO
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:0] 0x00000000
CLK_RATIO
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
Interface clock ratio - as a factor actual received clock. This is implementation specific
and depends on any serial to parallel conversion and interface type (ddr/sdr/qdr).
ENDFIELD
############################################################################################
############################################################################################
REG
0x0017
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
STATUS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[4] 0x00000000
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
ADC_CTRL_STATUS
RO
If set, indicates that the device'​s register data is available on the data bus.
ENDFIELD
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[3] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PN_ERR
RO
If set, indicates pn error in one or more channels.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PN_OOS
RO
If set, indicates pn oos in one or more channels.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
OVER_RANGE
RO
If set, indicates over range in one or more channels.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
STATUS
RO
Interface status, if set indicates no errors. If not set, there
are errors, software may try resetting the cores.
ENDFIELD
############################################################################################
############################################################################################
REG
0x0018
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
DELAY_CNTRL
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status(''Deprecated from version 9'')
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[17] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DELAY_SEL
RW
Delay select, a 0x0 to 0x1 transition in this register initiates
a delay access controlled by the registers below.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[16] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DELAY_RWN
RW
Delay read (0x1) or write (0x0), the delay is accessed directly
(no increment or decrement) with an address corresponding to each pin,
and data corresponding to the total delay.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:8] 0x00000000
DELAY_ADDRESS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
Delay address, the range depends on the interface pins, data pins
are usually at the lower range.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[4:0] 0x00000000
DELAY_WDATA
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
Delay write data, a value of 1 corresponds to (1/200)ns for most devices.
ENDFIELD
############################################################################################
############################################################################################
REG
0x0019
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
DELAY_STATUS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status(''Deprecated from version 9'')
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[9] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DELAY_LOCKED
RO
Indicates delay locked (0x1) state. If this bit is read 0x0, delay control
has failed to calibrate the elements.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[8] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DELAY_STATUS
RO
If set, indicates busy status (access pending). The read data may not be
valid if this bit is set.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[4:0] 0x00000000
DELAY_RDATA
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
Delay read data, current delay value in the elements
ENDFIELD
############################################################################################
############################################################################################
REG
0x001A
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
SYNC_STATUS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Synchronization Status register
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC_SYNC
RO
ADC synchronization status. Will be set to 1 after the synchronization has been completed
or while waiting for the synchronization signal in JESD204 systems.
ENDFIELD
############################################################################################
############################################################################################
REG
0x001C
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
DRP_CNTRL
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[28] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DRP_RWN
RW
DRP read (0x1) or write (0x0) select (does not include GTX lanes).
NOT-APPLICABLE if DRP_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[27:16] 0x00000000
DRP_ADDRESS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
DRP address, designs that contain more than one DRP accessible primitives
have selects based on the most significant bits (does not include GTX lanes).
NOT-APPLICABLE if DRP_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
RESERVED
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
Reserved for backward compatibility.
ENDFIELD
############################################################################################
############################################################################################
REG
0x001D
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
DRP_STATUS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[17] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DRP_LOCKED
RO
If set indicates that the DRP has been locked.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[16] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DRP_STATUS
RO
If set indicates busy (access pending). The read data may not be valid if
this bit is set (does not include GTX lanes).
NOT-APPLICABLE if DRP_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
RESERVED
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
Reserved for backward compatibility.
ENDFIELD
############################################################################################
############################################################################################
REG
0x001E
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
DRP_WDATA
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC DRP Write Data
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
DRP_WDATA
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
DRP write data (does not include GTX lanes).
NOT-APPLICABLE if DRP_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
REG
0x001F
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
DRP_RDATA
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC DRP Read Data
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
DRP_RDATA
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
DRP read data (does not include GTX lanes).
ENDFIELD
############################################################################################
############################################################################################
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
REG
0x0020
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_CONFIG_WR
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
ADC Write Configuration ​Data
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:0] 0x00000000
ADC_CONFIG_WR
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
RW
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
Custom ​Write to the available registers.
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
ENDFIELD
############################################################################################
############################################################################################
REG
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
0x0021
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_CONFIG_RD
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
ADC Read Configuration ​Data
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:0] 0x00000000
ADC_CONFIG_RD
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
RO
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
Custom read of the available registers.
up_adc_common: Update IPs and adi_regmap_adc definition file to latest up_adc_common module
2022-09-29 05:26:51 +00:00
ENDFIELD
############################################################################################
############################################################################################
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
REG
0x0022
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
UI_STATUS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
User Interface Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
UI_OVF
RW1C
User Interface overflow. If set, indicates an overflow occurred during data transfer at
the user interface (FIFO interface). Software must write a 0x1 to clear this register
bit.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
UI_UNF
RW1C
User Interface underflow. If set, indicates an underflow occurred during data transfer at
the user interface (FIFO interface). Software must write a 0x1 to clear this register
bit.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
UI_RESERVED
RW1C
Reserved for backward compatibility.
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
ENDFIELD
############################################################################################
############################################################################################
REG
0x0023
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_CONFIG_CTRL
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
ADC RD/WR configuration
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:0] 0x00000000
ADC_CONFIG_CTRL
docs/regmap: Updates on regmap text files to match the Wiki page updates.
2023-03-07 15:34:51 +00:00
RW
Control RD/WR requests to the device'​s register map: bit 1 - RD ('b1) , WR ('b0), bit 0 - enable WR/RD operation.
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ENDFIELD
############################################################################################
############################################################################################
REG
0x0028
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
USR_CNTRL_1
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[7:0] 0x00000000
USR_CHANMAX
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
This indicates the maximum number of inputs for the channel data multiplexers. User may add
different processing modules post data capture as another input to this common multiplexer.
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
REG
0x0029
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_START_CODE
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Synchronization start word
ENDREG
FIELD
[31:0] 0x00000000
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_START_CODE
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
This sets the startcode that is used by the ADCs for synchronization
NOT-APPLICABLE if START_CODE_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
REG
0x002E
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_GPIO_IN
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC GPIO inputs
ENDREG
FIELD
[31:0] 0x00000000
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_GPIO_IN
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
This reads auxiliary GPI pins of the ADC core
ENDFIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
############################################################################################
############################################################################################
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
REG
0x002F
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_GPIO_OUT
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC GPIO outputs
ENDREG
FIELD
[31:0] 0x00000000
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
ADC_GPIO_OUT
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
This controls auxiliary GPO pins of the ADC core
NOT-APPLICABLE if GPIO_DISABLE is set (0x1).
ENDFIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
############################################################################################
############################################################################################
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
REG
0x0030
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
PPS_COUNTER
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PPS Counter register
ENDREG
FIELD
[31:0] 0x00000000
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
PPS_COUNTER
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
Counts the core clock cycles (can be a device clock or interface clock) between two 1PPS pulse.
ENDFIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
############################################################################################
############################################################################################
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
REG
0x0031
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
PPS_STATUS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PPS Status register
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PPS_STATUS
RO
If this bit is asserted there is no incomming 1PPS signal. Maybe the source is out of sync or it's not active.
ENDFIELD
############################################################################################
############################################################################################
TITLE
ADC Channel (axi_ad*)
ADC_CHANNEL
ENDTITLE
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0100 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_CNTRLn
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[11] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC_LB_OWR
RW
If set, forces ADC_DATA_SEL to 1, enabling data loopback
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[10] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC_PN_SEL_OWR
RW
If set, forces ADC_PN_SEL to 0x9, device specific pn (e.g. ad9361)
If both ADC_PN_TYPE_OWR and ADC_PN_SEL_OWR are set, they are ignored
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[9] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
IQCOR_ENB
RW
if set, enables IQ correction or scale correction.
NOT-APPLICABLE if IQCORRECTION_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[8] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
DCFILT_ENB
RW
if set, enables DC filter (to disable DC offset, set offset value to 0x0).
NOT-APPLICABLE if DCFILTER_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[6] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
FORMAT_SIGNEXT
RW
if set, enables sign extension (applicable only in 2's complement mode). The data is
always sign extended to the nearest byte boundary.
NOT-APPLICABLE if DATAFORMAT_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[5] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
FORMAT_TYPE
RW
Select offset binary (0x1) or 2's complement (0x0) data type. This sets the incoming
data type and is required by the post processing modules for any data conversion.
NOT-APPLICABLE if DATAFORMAT_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[4] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
FORMAT_ENABLE
RW
Enable data format conversion (see register bits above).
NOT-APPLICABLE if DATAFORMAT_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[3] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RESERVED
RO
Reserved for backward compatibility.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RESERVED
RO
Reserved for backward compatibility.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC_PN_TYPE_OWR
RW
If set, forces ADC_PN_SEL to 0x1, modified pn23
If both ADC_PN_TYPE_OWR and ADC_PN_SEL_OWR are set, they are ignored
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ENABLE
RW
If set, enables channel. A 0x0 to 0x1 transition transfers all the control signals
to the respective channel processing module. If a channel is part of a complex
signal (I/Q), even channel is the master and the odd channel is the slave.
Though a single control is used, both must be individually selected.
ENDFIELD
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0101 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_STATUSn
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[12] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
CRC_ERR
RW1C
CRC errors. If set, indicates CRC error. Software must first clear this bit before initiating a transfer and monitor afterwards.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[11:4] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
STATUS_HEADER
RO
The status header sent by the ADC.(compatible with AD7768/AD7768-4/AD777x).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PN_ERR
RW1C
PN errors. If set, indicates spurious mismatches in sync state. This bit is cleared
if OOS is set and is only indicates errors when OOS is cleared.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[1] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
PN_OOS
RW1C
PN Out Of Sync. If set, indicates an OOS status. OOS is set, if 64 consecutive patterns
mismatch from the expected pattern. It is cleared, when 16 consecutive patterns match
the expected pattern.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[0] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
OVER_RANGE
RW1C
If set, indicates over range. Note that over range is independent of the data path,
it indicates an over range over a data transfer period. Software must first clear
this bit before initiating a transfer and monitor afterwards.
ENDFIELD
up_adc_channel: Update IPs and adi_regmap_adc definition file to latest up_adc_channel module
2022-09-12 15:51:08 +00:00
############################################################################################
############################################################################################
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
up_adc_channel: Update IPs and adi_regmap_adc definition file to latest up_adc_channel module
2022-09-12 15:51:08 +00:00
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0102 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_RAW_DATAn
up_adc_channel: Update IPs and adi_regmap_adc definition file to latest up_adc_channel module
2022-09-12 15:51:08 +00:00
ADC Raw Data Reading
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:0] 0x00000000
ADC_READ_DATA
up_adc_channel: Update IPs and adi_regmap_adc definition file to latest up_adc_channel module
2022-09-12 15:51:08 +00:00
RO
Raw data read from the ADC.
ENDFIELD
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0104 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_CNTRLn_1
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:16] 0x00000000
DCFILT_OFFSET
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
DC removal (if equipped) offset. This is a 2's complement number added to the incoming
data to remove a known DC offset.
NOT-APPLICABLE if DCFILTER_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
DCFILT_COEFF
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
DC removal filter (if equipped) coefficient. The format is 1.1.14 (sign, integer and
fractional bits).
NOT-APPLICABLE if DCFILTER_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0105 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_CNTRLn_2
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:16] 0x00000000
IQCOR_COEFF_1
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
IQ correction (if equipped) coefficient. If scale & offset is implemented, this is the scale value
and the format is 1.1.14 (sign, integer and fractional bits). If matrix multiplication is used,
this is the channel I coefficient and the format is 1.1.14 (sign, integer and fractional bits).
If SCALECORRECTION_ONLY is set, this implements the scale value correction for the current channel
with the format 1.1.14 (sign, integer and fractional bits).
NOT-APPLICABLE if IQCORRECTION_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
IQCOR_COEFF_2
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
IQ correction (if equipped) coefficient. If scale & offset is implemented, this is the offset value
and the format is 2's complement. If matrix multiplication is used, this is the channel Q coefficient
and the format is 1.1.14 (sign, integer and fractional bits).
NOT-APPLICABLE if IQCORRECTION_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0106 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_CNTRLn_3
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[19:16] 0x00000000
ADC_PN_SEL
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
Selects the PN monitor sequence type (available only if ADC supports it). \\
- 0x0: pn9a (device specific, modified pn9) \\
- 0x1: pn23a (device specific, modified pn23) \\
- 0x4: pn7 (standard O.150) \\
- 0x5: pn15 (standard O.150) \\
- 0x6: pn23 (standard O.150) \\
- 0x7: pn31 (standard O.150) \\
- 0x9: pnX (device specific, e.g. ad9361) \\
- 0x0A: Nibble ramp (Device specific e.g. adrv9001) \\
- 0x0B: 16 bit ramp (Device specific e.g. adrv9001) \\
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[3:0] 0x00000000
ADC_DATA_SEL
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
Selects the data source to DMA.
0x0: input data (ADC)
0x1: loopback data (DAC)
ENDFIELD
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0108 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_USR_CNTRLn_1
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[25] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
USR_DATATYPE_BE
RO
The user data type format- if set, indicates big endian (default is little endian).
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[24] 0x00000000
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
USR_DATATYPE_SIGNED
RO
The user data type format- if set, indicates signed (2's complement) data (default is unsigned).
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[23:16] 0x00000000
USR_DATATYPE_SHIFT
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
The user data type format- the amount of right shift for actual samples within the total number
of bits.
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:8] 0x00000000
USR_DATATYPE_TOTAL_BITS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
The user data type format- number of total bits used for a sample. The total number of bits must
be an integer multiple of 8 (byte aligned).
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[7:0] 0x00000000
USR_DATATYPE_BITS
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RO
The user data type format- number of bits in a sample. This indicates the actual sample data bits.
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x0109 + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_USR_CNTRLn_2
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
ADC Interface Control & Status
ENDREG
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[31:16] 0x00000000
USR_DECIMATION_M
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
This holds the user decimation M value of the channel that is currently being selected on
the multiplexer above. The total decimation factor is of the form M/N.
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[15:0] 0x00000000
USR_DECIMATION_N
docs/regmap: Added ADI regmap_*.txt files (#1008)
2022-09-21 12:12:35 +00:00
RW
This holds the user decimation N value of the channel that is currently being selected on
the multiplexer above. The total decimation factor is of the form M/N.
NOT-APPLICABLE if USERPORTS_DISABLE is set (0x1).
ENDFIELD
############################################################################################
############################################################################################
add: softspan support in adc_channel regmap (#1081) docs/regmap/adi_regmap_adc.txt: - add softspan to regmap library/common/up_adc_channel.v - update copyright year header - add softspan to regmap library/common/up_adc_common.v - update minor version Signed-off-by: John Erasmus Mari Geronimo <Johnerasmusmari.Geronimo@analog.com>
2023-04-20 11:05:38 +00:00
REG
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
0x010A + 0x16*n
WHERE n IS FROM 0 TO 15
CHAN_CNTRLn_4
add: softspan support in adc_channel regmap (#1081) docs/regmap/adi_regmap_adc.txt: - add softspan to regmap library/common/up_adc_channel.v - update copyright year header - add softspan to regmap library/common/up_adc_common.v - update minor version Signed-off-by: John Erasmus Mari Geronimo <Johnerasmusmari.Geronimo@analog.com>
2023-04-20 11:05:38 +00:00
ADC Interface Control & Status
ENDREG
FIELD
[31:3] 0x00000000
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
RESERVED
add: softspan support in adc_channel regmap (#1081) docs/regmap/adi_regmap_adc.txt: - add softspan to regmap library/common/up_adc_channel.v - update copyright year header - add softspan to regmap library/common/up_adc_common.v - update minor version Signed-off-by: John Erasmus Mari Geronimo <Johnerasmusmari.Geronimo@analog.com>
2023-04-20 11:05:38 +00:00
RO
Reserved for backward compatibility.
ENDFIELD
FIELD
docs: Intermediary for IP Cores import, user guide, regmap (#1321) Use interref (doctools cross-repository) to link the docs guidelines Add user guide pages, update IP references Add axi_adc/dac, up_if, "Use ADI IPs", "Creating new IP", Update AXI DMAC, JESD204, I3C Controller, SPI Engines Minor fixes in the frameworks and register maps, the latter following the discussed guidelines. Update AXI terms to manager and subordinate. Signed-off-by: Jorge Marques <jorge.marques@analog.com> Signed-off-by: Laez Barbosa <laez.barbosa@analog.com> Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
2024-05-13 13:05:12 +00:00
[2:0] 0x00000007
SOFTSPAN
add: softspan support in adc_channel regmap (#1081) docs/regmap/adi_regmap_adc.txt: - add softspan to regmap library/common/up_adc_channel.v - update copyright year header - add softspan to regmap library/common/up_adc_common.v - update minor version Signed-off-by: John Erasmus Mari Geronimo <Johnerasmusmari.Geronimo@analog.com>
2023-04-20 11:05:38 +00:00
RW
Softspan configuration register.
ENDFIELD
############################################################################################
############################################################################################