274 lines
9.2 KiB
ReStructuredText
274 lines
9.2 KiB
ReStructuredText
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.. _ad5766_sdz:
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AD5766-SDZ HDL project
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===============================================================================
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Overview
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-------------------------------------------------------------------------------
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The :adi:`AD5766`/ :adi:`AD5767` are 16-channel, 16-/12-bit, voltage output
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Digital-to-Analog Converters (DAC). The DAC generates output voltage ranges from
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an external 2.5 V reference. Depending on the span selected, the mid-point of
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the output span can be adjusted allowing for a minimum output voltage as low as
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−20 V or a maximum output voltage of up to +14 V.
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The :adi:`AD5766`/ :adi:`AD5767` have integrated output buffers which can sink
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or source up to 20 mA. This makes the AD5766/AD5767 suitable for Indium Phosphide
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Mach Zehnder Modulator (InP-MZM) biasing applications.
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The part incorporates a power-on reset circuit that ensures that the DAC outputs
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power up to 0V and remain at this level until the output range of the DAC is
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configured. The outputs of all DACs are updated through register configuration,
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with the added functionality of user-selectable DAC channels to be simultaneously
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updated.
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The :adi:`AD5766`/ :adi:`AD5767` require four power supplies. AVCC is the analog
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supply for the low voltage DAC circuitry. AVDD and AVSS are the positive and
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negative high voltage power supplies for the output amplifiers. A VLOGIC supply
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pin is provided to set the logic levels for the digital interface pins.
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The :adi:`AD5766`/ :adi:`AD5767` utilize a versatile 4-wire serial interface
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that operates at clock rates of up to 50 MHz for write mode and up to 10MHz for
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readback and daisy-chain mode, and is compatible with SPIR, QSPI., MICROWIRE.
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and DSP interface standards.
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The :adi:`AD5766`/ :adi:`AD5767` are available in a 4mm x 4mm WLCSP package
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and operates at the range of -40C to +105C.
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Applications:
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* Mach Zehnder Modulator Bias Control
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* Analog Output Modules
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* Process Control
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Supported boards
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-------------------------------------------------------------------------------
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- :adi:`EVAL-AD5766 <EVAL-AD5766>`
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Supported devices
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-------------------------------------------------------------------------------
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- :adi:`AD5766`
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- :adi:`AD5767`
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Supported carriers
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-------------------------------------------------------------------------------
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- :xilinx:`ZedBoard <products/boards-and-kits/1-8dyf-11.html>` on FMC slot
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- :adi:`SDP-I-FMC <EVAL-SDP-I-FMC>`
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Block design
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-------------------------------------------------------------------------------
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Block diagram
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The data path and clock domains are depicted in the below diagram:
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.. image:: ad5766_spi_engine_hdl.svg
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:width: 800
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:align: center
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:alt: AD5766_SDZ block diagram
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Jumper setup
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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================== ================= ==========================================
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Jumper/Solder link Default Position Description
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================== ================= ==========================================
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LK1,LK2,LK3 A Supplied by the 3.3 V supply (J12)
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LK4,LK5 B Supplied by the :adi:`ADP5071` power
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solution
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LK6 B Positive and negative output rails power
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up simultaneously when EN2 is high
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LK7 A Selects the :adi:`ADR4525` 2.5 V reference
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LK8 B Supplied by the 3.3 V supply (J12)
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LK9 A 1.2 MHz switching frequency (default)
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LK10 A Slowest slew rate (best noise performance)
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LK11,LK12 Removed Insert link to bypass the LC filter on the
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:adi:`ADP5071` positive output
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SW1 Pos-2 ADP5070_VPOS = +8V, ADP5070_VNEG = -22V
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================== ================= ==========================================
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CPU/Memory interconnects addresses
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The addresses are dependent on the architecture of the FPGA, having an offset
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added to the base address from HDL (see more at :ref:`architecture`).
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======================== ===========
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Instance Address
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======================== ===========
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spi/axi 0x44A0_0000
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spi/axi_ad5766 0x44A1_0000
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axi_ad5766_dac_dma 0x44A2_0000
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======================== ===========
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I2C connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 20 20 20 20 20
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:header-rows: 1
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* - I2C type
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- I2C manager instance
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- Alias
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- Address
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- I2C subordinate
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* - PL
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- iic_fmc
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- axi_iic_fmc
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- 0x4162_0000
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- ---
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* - PL
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- iic_main
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- axi_iic_main
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- 0x4160_0000
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- ---
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SPI connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 1
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* - SPI type
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- SPI manager instance
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- SPI subordinate
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- CS
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* - PL
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- axi_spi_engine
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- ad5766
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- 0
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GPIOs
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The Software GPIO number is calculated as follows:
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- Zynq-7000: if PS7 is used, then offset is 54
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 2
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* - GPIO signal
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- Direction
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- HDL GPIO EMIO
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- Software GPIO
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* -
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- (from FPGA view)
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-
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- Zynq-7000
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* - reset
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- INOUT
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- 32
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- 86
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Interrupts
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Below are the Programmable Logic interrupts used in this project.
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=================== === ========== ===========
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Instance name HDL Linux Zynq Actual Zynq
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=================== === ========== ===========
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axi_ad5766_dac_dma 13 57 89
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spi 12 56 88
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=================== === ========== ===========
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Building the HDL project
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-------------------------------------------------------------------------------
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The design is built upon ADI's generic HDL reference design framework.
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ADI does not distribute the bit/elf files of these projects so they
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must be built from the sources available :git-hdl:`here </>`. To get
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the source you must
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`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
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the HDL repository, and then build the project as follows:
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**Linux/Cygwin/WSL**
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.. code-block::
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:linenos:
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user@analog:~$ cd hdl/projects/ad5766_sdz/zed
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user@analog:~/hdl/projects/ad5766_sdz/zed$ make
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A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
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Resources
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-------------------------------------------------------------------------------
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Hardware related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Product datasheets:
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- :adi:`AD5766`
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- :adi:`AD5767`
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- `UG-1070, Evaluation Board User Guide <https://www.analog.com/media/en/technical-documentation/user-guides/EVAL-AD5766SD2Z-5767SD2Z-UG-1070.pdf>`__
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HDL related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-hdl:`ad5766_sdz HDL project source code <projects/ad5766_sdz>`
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.. list-table::
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:widths: 30 35 35
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:header-rows: 1
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* - IP name
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- Source code link
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- Documentation link
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* - AXI_AD5766
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- :git-hdl:`library/axi_ad5766 <library/axi_ad5766>`
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- ---
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* - AXI_CLKGEN
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- :git-hdl:`library/axi_dmac <library/axi_clkgen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_clkgen>`
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* - AXI_DMAC
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- :git-hdl:`library/axi_dmac <library/axi_dmac>`
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- :ref:`here <axi_dmac>`
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* - AXI_HDMI_TX
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- :git-hdl:`library/axi_hdmi_tx <library/axi_hdmi_tx>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_hdmi_tx>`
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* - AXI_I2S_ADI
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- :git-hdl:`library/axi_i2s_adi <library/axi_i2s_adi>`
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- ---
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* - AXI_SPDIF_TX
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- :git-hdl:`library/axi_spdif_tx <library/axi_spdif_tx>`
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- ---
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* - AXI_SYSID
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- :git-hdl:`library/axi_sysid <library/axi_sysid>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - AXI_SPI_ENGINE
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- :git-hdl:`library/spi_engine/axi_spi_engine <library/spi_engine/axi_spi_engine>`
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- :ref:`here <spi_engine axi>`
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* - SPI_ENGINE_EXECUTION
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- :git-hdl:`library/spi_engine/spi_engine_execution <library/spi_engine/spi_engine_execution>`
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- :ref:`here <spi_engine execution>`
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* - SPI_ENGINE_INTERCONNECT
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- :git-hdl:`library/spi_engine/spi_engine_interconnect <library/spi_engine/spi_engine_interconnect>`
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- :ref:`here <spi_engine interconnect>`
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* - SYSID_ROM
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- :git-hdl:`library/sysid_rom <library/sysid_rom>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - UTIL_I2C-MIXER
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- :git-hdl:`library/util_i2c_mixer <library/util_i2c_mixer>`
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- ---
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- :ref:`SPI Engine Framework documentation <spi_engine>`
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Software related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-no-os:`AD5766 - No-OS driver source code <projects/ad5766-sdz>`
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- :dokuwiki:`AD5766 - No-OS Driver [Wiki] <resources/tools-software/uc-drivers/ad5766>`
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- :dokuwiki:`How to build No-OS <resources/no-os/build>`
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.. include:: ../common/more_information.rst
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.. include:: ../common/support.rst
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