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pluto_hdl_adi/projects/imageon/common/imageon_bd.tcl

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imageon: Initial commit Initial commit of the IMAGEON project for ZC706. NOT tested.
2015-01-08 15:01:22 +00:00
imageon: updates
2015-03-24 19:08:22 +00:00
# adv7511 (reconfigure base design)
imageon: Initial commit Initial commit of the IMAGEON project for ZC706. NOT tested.
2015-01-08 15:01:22 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports hdmi_out_clk]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports hdmi_vsync]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports hdmi_hsync]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports hdmi_data_e]]]
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports hdmi_data]]]
imageon: updates
2015-03-24 19:08:22 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
delete_bd_objs [get_bd_ports hdmi_out_clk]
delete_bd_objs [get_bd_ports hdmi_vsync]
delete_bd_objs [get_bd_ports hdmi_hsync]
delete_bd_objs [get_bd_ports hdmi_data_e]
delete_bd_objs [get_bd_ports hdmi_data]
imageon: Initial commit Initial commit of the IMAGEON project for ZC706. NOT tested.
2015-01-08 15:01:22 +00:00
axi_hdmi_tx: Added INTERFACE parameter for selecting the interface type Update all carriers/projects bd for configurable video interface: - common zc702, zc706, zed - adrv9361z7035/ccfmc_lvds - imageon
2018-07-23 12:21:44 +00:00
ad_ip_parameter axi_hdmi_core CONFIG.INTERFACE 16_BIT_EMBEDDED_SYNC
imageon: ip automatic version update
2017-04-14 13:54:42 +00:00
ad_ip_parameter axi_hdmi_core CONFIG.OUT_CLK_POLARITY 1
imageon_zc706: Update the project to the new framework
2015-03-23 10:45:34 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
create_bd_port -dir O hdmi_tx_clk
create_bd_port -dir O -from 15 -to 0 hdmi_tx_data
imageon_zc706: Update the project to the new framework
2015-03-23 10:45:34 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
ad_connect hdmi_tx_clk axi_hdmi_core/hdmi_out_clk
ad_connect hdmi_tx_data axi_hdmi_core/hdmi_16_es_data
imageon: updates
2015-03-24 19:08:22 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
# adv7611
imageon: updates
2015-03-24 19:08:22 +00:00
imageon: ip automatic version update
2017-04-14 13:54:42 +00:00
ad_ip_instance axi_hdmi_rx axi_hdmi_rx_core
ad_ip_instance axi_dmac axi_hdmi_rx_dma
ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_TYPE_SRC 2
ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_TYPE_DEST 0
ad_ip_parameter axi_hdmi_rx_dma CONFIG.CYCLIC 0
ad_ip_parameter axi_hdmi_rx_dma CONFIG.AXI_SLICE_SRC 1
ad_ip_parameter axi_hdmi_rx_dma CONFIG.AXI_SLICE_DEST 1
ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_2D_TRANSFER 1
ad_ip_parameter axi_hdmi_rx_dma CONFIG.SYNC_TRANSFER_START 1
ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_LENGTH_WIDTH 14
ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_DATA_WIDTH_SRC 64
ad_ip_parameter axi_hdmi_rx_dma CONFIG.DMA_DATA_WIDTH_DEST 64
ad_ip_parameter axi_hdmi_rx_dma CONFIG.FIFO_SIZE 16
imageon: updates
2015-03-24 19:08:22 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
create_bd_port -dir I hdmi_rx_clk
create_bd_port -dir I -from 15 -to 0 hdmi_rx_data
imageon: updates
2015-03-24 19:08:22 +00:00
ad_connect hdmi_rx_clk axi_hdmi_rx_core/hdmi_rx_clk
ad_connect hdmi_rx_data axi_hdmi_rx_core/hdmi_rx_data
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
imageon: Connect hdmi_rx_core output clock to DMA Connect the HDMI RX core output clock to the DMA rather than connecting the HDMI RX input clock directly. This will allow the HDMI RX core to modify the clock and e.g. insert clock buffers or similar. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-29 12:15:15 +00:00
ad_connect axi_hdmi_rx_core/hdmi_clk axi_hdmi_rx_dma/fifo_wr_clk
imageon: updates
2015-03-24 19:08:22 +00:00
ad_connect axi_hdmi_rx_core/hdmi_dma_sof axi_hdmi_rx_dma/fifo_wr_sync
ad_connect axi_hdmi_rx_core/hdmi_dma_de axi_hdmi_rx_dma/fifo_wr_en
ad_connect axi_hdmi_rx_core/hdmi_dma_data axi_hdmi_rx_dma/fifo_wr_din
ad_connect axi_hdmi_rx_core/hdmi_dma_ovf axi_hdmi_rx_dma/fifo_wr_overflow
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
ad_connect axi_hdmi_rx_core/hdmi_dma_unf GND
block_design: Updates with new reset net variables
2019-05-30 06:43:44 +00:00
ad_connect $sys_cpu_resetn axi_hdmi_rx_dma/m_dest_axi_aresetn
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
ad_cpu_interconnect 0x43100000 axi_hdmi_rx_core
ad_cpu_interconnect 0x43C20000 axi_hdmi_rx_dma
block_design: Update with new clock net variables Using the new clock net variables in all Xilinx block designs.
2019-05-27 10:04:15 +00:00
ad_mem_hp2_interconnect $sys_cpu_clk sys_ps7/S_AXI_HP2
ad_mem_hp2_interconnect $sys_cpu_clk axi_hdmi_rx_dma/m_dest_axi
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
ad_cpu_interrupt ps-12 mb-12 axi_hdmi_rx_dma/irq
# spdif tx
delete_bd_objs [get_bd_nets -of_objects [find_bd_objs -relation connected_to [get_bd_ports spdif]]]
delete_bd_objs [get_bd_ports spdif]
create_bd_port -dir O spdif_tx
ad_connect spdif_tx axi_spdif_tx_core/spdif_tx_o
# spdif rx
create_bd_port -dir I spdif_rx
imageon: updates
2015-03-24 19:08:22 +00:00
imageon: ip automatic version update
2017-04-14 13:54:42 +00:00
ad_ip_instance axi_spdif_rx axi_spdif_rx_core
ad_ip_parameter axi_spdif_rx_core CONFIG.C_S_AXI_ADDR_WIDTH 16
ad_ip_parameter axi_spdif_rx_core CONFIG.C_DMA_TYPE 1
imageon_ZC706: Add axi_spdif_rx core to the design
2015-07-03 14:48:29 +00:00
imageon: ip automatic version update
2017-04-14 13:54:42 +00:00
ad_ip_parameter sys_ps7 CONFIG.PCW_USE_DMA3 1
imageon_ZC706: Add axi_spdif_rx core to the design
2015-07-03 14:48:29 +00:00
block_design: Updates with new reset net variables
2019-05-30 06:43:44 +00:00
ad_connect $sys_cpu_clk axi_spdif_rx_core/DMA_REQ_ACLK
ad_connect $sys_cpu_clk sys_ps7/DMA3_ACLK
ad_connect $sys_cpu_resetn axi_spdif_rx_core/DMA_REQ_RSTN
imageon: moved spdif_rx to DMA3 to be compatible with both zc706 and zed
2015-07-09 07:58:54 +00:00
ad_connect sys_ps7/DMA3_REQ axi_spdif_rx_core/DMA_REQ
ad_connect sys_ps7/DMA3_ACK axi_spdif_rx_core/DMA_ACK
imageon_ZC706: Add axi_spdif_rx core to the design
2015-07-03 14:48:29 +00:00
ad_connect spdif_rx axi_spdif_rx_core/spdif_rx_i
ad_cpu_interconnect 0x75C20000 axi_spdif_rx_core
imageon: updates
2015-03-24 19:08:22 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
# iic interface
imageon_zc706: Update project + Connect the Rx path to HP2 + Enable AXI_SLICE_DEST + Add ILA to the dma_fifo and dma_axi_s2mm interface + Fix constraints
2015-04-01 15:50:18 +00:00
imageon: ip automatic version update
2017-04-14 13:54:42 +00:00
ad_ip_instance axi_iic axi_iic_imageon
ad_ip_parameter axi_iic_imageon CONFIG.USE_BOARD_FLOW true
ad_ip_parameter axi_iic_imageon CONFIG.IIC_BOARD_INTERFACE Custom
imageon_zc706: Update project + Connect the Rx path to HP2 + Enable AXI_SLICE_DEST + Add ILA to the dma_fifo and dma_axi_s2mm interface + Fix constraints
2015-04-01 15:50:18 +00:00
imageon/zc706- board updates
2016-06-01 17:54:45 +00:00
create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_imageon
ad_connect iic_imageon axi_iic_imageon/iic
ad_cpu_interconnect 0x43C40000 axi_iic_imageon
ad_cpu_interrupt ps-11 mb-11 axi_iic_imageon/iic2intc_irpt
Revert "imageon: Connect raw data to ILA" This reverts commit 9e4fb2d048eb69cfdc1c5970abce856216a6be20. This conflicts with moving the capture FF into the IOB. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-02 13:38:22 +00:00