2015-04-01 20:26:27 +00:00
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####################################################################################
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2018-03-23 09:19:51 +00:00
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## Copyright 2018(c) Analog Devices, Inc.
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2015-04-01 20:26:27 +00:00
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## Auto-generated, do not modify!
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####################################################################################
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2018-03-23 09:19:51 +00:00
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LIBRARY_NAME := axi_ad9739a
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2015-04-01 20:26:27 +00:00
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2018-03-27 09:21:09 +00:00
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GENERIC_DEPS += ../common/ad_dds.v
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GENERIC_DEPS += ../common/ad_dds_1.v
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GENERIC_DEPS += ../common/ad_dds_sine.v
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GENERIC_DEPS += ../common/ad_rst.v
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GENERIC_DEPS += ../common/up_axi.v
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GENERIC_DEPS += ../common/up_clock_mon.v
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GENERIC_DEPS += ../common/up_dac_channel.v
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GENERIC_DEPS += ../common/up_dac_common.v
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GENERIC_DEPS += ../common/up_xfer_cntrl.v
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GENERIC_DEPS += ../common/up_xfer_status.v
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GENERIC_DEPS += axi_ad9739a.v
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GENERIC_DEPS += axi_ad9739a_channel.v
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GENERIC_DEPS += axi_ad9739a_core.v
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GENERIC_DEPS += axi_ad9739a_if.v
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XILINX_DEPS += ../xilinx/common/ad_mul.v
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XILINX_DEPS += ../xilinx/common/ad_rst_constr.xdc
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XILINX_DEPS += ../xilinx/common/ad_serdes_out.v
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XILINX_DEPS += ../xilinx/common/up_clock_mon_constr.xdc
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XILINX_DEPS += ../xilinx/common/up_xfer_cntrl_constr.xdc
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XILINX_DEPS += ../xilinx/common/up_xfer_status_constr.xdc
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XILINX_DEPS += axi_ad9739a_ip.tcl
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2015-04-01 20:26:27 +00:00
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2018-03-23 09:19:51 +00:00
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include ../scripts/library.mk
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