107 lines
4.9 KiB
Tcl
107 lines
4.9 KiB
Tcl
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# prcfg io
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create_bd_port -dir O clk
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create_bd_port -dir I dma_dac_en
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create_bd_port -dir O dma_dac_dvalid
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create_bd_port -dir O -from 63 -to 0 dma_dac_ddata
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create_bd_port -dir O dma_dac_dunf
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create_bd_port -dir O core_dac_en
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create_bd_port -dir I core_dac_dvalid
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create_bd_port -dir I -from 63 -to 0 core_dac_ddata
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create_bd_port -dir I core_dac_dunf
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create_bd_port -dir O core_adc_dwr
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create_bd_port -dir O core_adc_dsync
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create_bd_port -dir O -from 63 -to 0 core_adc_ddata
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create_bd_port -dir I core_adc_ovf
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create_bd_port -dir I dma_adc_dwr
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create_bd_port -dir I dma_adc_dsync
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create_bd_port -dir I -from 63 -to 0 dma_adc_ddata
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create_bd_port -dir O dma_adc_ovf
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create_bd_port -dir I -from 31 -to 0 up_dac_gpio_in
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create_bd_port -dir I -from 31 -to 0 up_adc_gpio_in
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create_bd_port -dir O -from 31 -to 0 up_dac_gpio_out
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create_bd_port -dir O -from 31 -to 0 up_adc_gpio_out
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# re-wiring
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_dac_dma/fifo_rd_en]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_dac_dma/fifo_rd_valid]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_dac_dma/fifo_rd_dout]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_dac_dma/fifo_rd_underflow]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_adc_dma/fifo_wr_en]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_adc_dma/fifo_wr_sync]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_adc_dma/fifo_wr_din]]
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delete_bd_objs [get_bd_nets -of_objects [get_bd_pins axi_ad9361_adc_dma/fifo_wr_overflow]]
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ad_connect clk axi_ad9361/clk
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ad_connect dma_dac_en axi_ad9361_dac_dma/fifo_rd_en
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ad_connect dma_dac_dvalid axi_ad9361_dac_dma/fifo_rd_valid
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ad_connect dma_dac_ddata axi_ad9361_dac_dma/fifo_rd_dout
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ad_connect dma_dac_dunf axi_ad9361_dac_dma/fifo_rd_underflow
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ad_connect core_dac_en util_dac_unpack/dma_rd
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ad_connect core_dac_dvalid util_dac_unpack/fifo_valid
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ad_connect core_dac_ddata util_dac_unpack/dma_data
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ad_connect core_dac_dunf axi_ad9361/dac_dunf
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ad_connect up_dac_gpio_in axi_ad9361/up_dac_gpio_in
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ad_connect up_dac_gpio_out axi_ad9361/up_dac_gpio_out
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ad_connect dma_adc_dwr axi_ad9361_adc_dma/fifo_wr_en
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ad_connect dma_adc_dsync axi_ad9361_adc_dma/fifo_wr_sync
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ad_connect dma_adc_ddata axi_ad9361_adc_dma/fifo_wr_din
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ad_connect dma_adc_ovf axi_ad9361_adc_dma/fifo_wr_overflow
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ad_connect core_adc_dwr util_adc_pack/dvalid
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ad_connect core_adc_dsync util_adc_pack/dsync
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ad_connect core_adc_ddata util_adc_pack/ddata
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ad_connect core_adc_ovf axi_ad9361/adc_dovf
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ad_connect up_adc_gpio_in axi_ad9361/up_adc_gpio_in
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ad_connect up_adc_gpio_out axi_ad9361/up_adc_gpio_out
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# monitoring
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set ila_adc_core [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_adc_core]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc_core
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc_core
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc_core
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc_core
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set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_adc_core
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ad_connect clk ila_adc_core/clk
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ad_connect util_adc_pack/dvalid ila_adc_core/probe0
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ad_connect util_adc_pack/ddata ila_adc_core/probe1
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set ila_dac_core [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_dac_core]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_dac_core
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_dac_core
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_dac_core
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_dac_core
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set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_dac_core
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ad_connect clk ila_dac_core/clk
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ad_connect util_dac_unpack/fifo_valid ila_dac_core/probe0
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ad_connect util_dac_unpack/dma_data ila_dac_core/probe1
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set ila_adc_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_adc_dma]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc_dma
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc_dma
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc_dma
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_adc_dma
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set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_adc_dma
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ad_connect clk ila_adc_dma/clk
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ad_connect axi_ad9361_adc_dma/fifo_wr_en ila_adc_dma/probe0
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ad_connect axi_ad9361_adc_dma/fifo_wr_din ila_adc_dma/probe1
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set ila_dac_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_dac_dma]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_dac_dma
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_dac_dma
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_dac_dma
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {64}] $ila_dac_dma
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set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_dac_dma
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ad_connect clk ila_dac_dma/clk
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ad_connect axi_ad9361_dac_dma/fifo_rd_en ila_dac_dma/probe0
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ad_connect axi_ad9361_dac_dma/fifo_rd_dout ila_dac_dma/probe1
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