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pluto_hdl_adi/library/axi_logic_analyzer/Makefile

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axi_logic_analyzer: Initial commit
2017-01-31 14:23:56 +00:00
####################################################################################
####################################################################################
## Copyright 2011(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
####################################################################################
M_DEPS += ../common/ad_rst.v
M_DEPS += ../common/up_axi.v
M_DEPS += ../common/up_xfer_cntrl.v
M_DEPS += ../common/up_xfer_status.v
M_DEPS += ../scripts/adi_env.tcl
M_DEPS += ../scripts/adi_ip.tcl
constraints: up_xfer_cntrl and up_xfer_status have its own constraints The up_xfer_cntrl and up_xfer_status modules have its own constraints files in library/xilinx/common. Each IP which has an instance of these modules, have to use these constraints files. The following IPs were modified: - axi_adc_decimate - axi_adc_trigger - axi_dac_interpolate - axi_logic_analyzer
2018-02-28 10:05:15 +00:00
M_DEPS += ../xilinx/common/ad_rst_constr.xdc
M_DEPS += ../xilinx/common/up_xfer_cntrl_constr.xdc
M_DEPS += ../xilinx/common/up_xfer_status_constr.xdc
axi_logic_analyzer: Initial commit
2017-01-31 14:23:56 +00:00
M_DEPS += axi_logic_analyzer.v
M_DEPS += axi_logic_analyzer_constr.xdc
M_DEPS += axi_logic_analyzer_ip.tcl
M_DEPS += axi_logic_analyzer_reg.v
M_DEPS += axi_logic_analyzer_trigger.v
M_VIVADO := vivado -mode batch -source
M_FLIST := *.cache
M_FLIST += *.data
M_FLIST += *.xpr
M_FLIST += *.log
M_FLIST += component.xml
M_FLIST += *.jou
M_FLIST += xgui
M_FLIST += *.ip_user_files
M_FLIST += *.srcs
M_FLIST += *.hw
M_FLIST += *.sim
M_FLIST += .Xil
.PHONY: all clean clean-all
all: axi_logic_analyzer.xpr
clean:clean-all
clean-all:
rm -rf $(M_FLIST)
axi_logic_analyzer.xpr: $(M_DEPS)
-rm -rf $(M_FLIST)
$(M_VIVADO) axi_logic_analyzer_ip.tcl >> axi_logic_analyzer_ip.log 2>&1
####################################################################################
####################################################################################