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pluto_hdl_adi/projects/adrv9371x/kcu105/system_project.tcl

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adrv9371x_kcu105: Initial commit
2017-08-22 12:41:49 +00:00
source ../../scripts/adi_env.tcl
project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl
2018-08-14 08:43:32 +00:00
source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
adrv9371x_kcu105: Initial commit
2017-08-22 12:41:49 +00:00
source $ad_hdl_dir/projects/scripts/adi_board.tcl
adi_project: Rename the process adi_project_xilinx to adi_project
2018-08-13 14:25:48 +00:00
adi_project adrv9371x_kcu105
adrv9371x_kcu105: Initial commit
2017-08-22 12:41:49 +00:00
adi_project_files adrv9371x_kcu105 [list \
"system_top.v" \
"system_constr.xdc"\
"$ad_hdl_dir/library/xilinx/common/ad_iobuf.v" \
adrv9371: Add decimation and interpolation filters
2019-06-24 13:16:43 +00:00
"$ad_hdl_dir/library/common/ad_bus_mux.v" \
"$ad_hdl_dir/library/common/util_pulse_gen.v" \
adrv9371x_kcu105: Initial commit
2017-08-22 12:41:49 +00:00
"$ad_hdl_dir/projects/common/kcu105/kcu105_system_constr.xdc" \
"$ad_hdl_dir/projects/common/kcu105/kcu105_system_lutram_constr.xdc" ]
adrv9371x:kcu105: Performance_Retiming results the highest WNS In default strategy we having a few path with small negative slack inside of the MIG, due to the high UI clock (300MHz). This new strategy solves this issue.
2018-07-20 13:44:55 +00:00
## To improve timing in DDR4 MIG
set_property strategy Performance_Retiming [get_runs impl_1]
adrv9371x_kcu105: Initial commit
2017-08-22 12:41:49 +00:00
adi_project_run adrv9371x_kcu105