pluto_hdl_adi/projects/arradio/c5soc/Makefile

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####################################################################################
## Copyright 2018(c) Analog Devices, Inc.
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## Auto-generated, do not modify!
####################################################################################
PROJECT_NAME := arradio_c5soc
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M_DEPS += ../common/arradio_qsys.tcl
M_DEPS += ../../common/c5soc/c5soc_system_qsys.tcl
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M_DEPS += ../../common/c5soc/c5soc_system_assign.tcl
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M_DEPS += ../../../library/altera/common/ad_dcfilter.v
M_DEPS += ../../../library/altera/common/ad_mul.v
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M_DEPS += ../../../library/altera/common/up_clock_mon_constr.sdc
M_DEPS += ../../../library/altera/common/up_rst_constr.sdc
M_DEPS += ../../../library/altera/common/up_xfer_cntrl_constr.sdc
M_DEPS += ../../../library/altera/common/up_xfer_status_constr.sdc
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M_DEPS += ../../../library/axi_ad9361/altera/axi_ad9361_cmos_if.v
M_DEPS += ../../../library/axi_ad9361/altera/axi_ad9361_lvds_if.v
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M_DEPS += ../../../library/axi_ad9361/altera/axi_ad9361_lvds_if_10.v
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M_DEPS += ../../../library/axi_ad9361/altera/axi_ad9361_lvds_if_c5.v
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M_DEPS += ../../../library/axi_ad9361/axi_ad9361.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_constr.sdc
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_hw.tcl
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_rx.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_rx_channel.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_rx_pnmon.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_tdd.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_tdd_if.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_tx.v
M_DEPS += ../../../library/axi_ad9361/axi_ad9361_tx_channel.v
M_DEPS += ../../../library/axi_dmac/2d_transfer.v
M_DEPS += ../../../library/axi_dmac/address_generator.v
M_DEPS += ../../../library/axi_dmac/axi_dmac.v
M_DEPS += ../../../library/axi_dmac/axi_dmac_constr.sdc
M_DEPS += ../../../library/axi_dmac/axi_dmac_hw.tcl
M_DEPS += ../../../library/axi_dmac/axi_register_slice.v
M_DEPS += ../../../library/axi_dmac/data_mover.v
M_DEPS += ../../../library/axi_dmac/dest_axi_mm.v
M_DEPS += ../../../library/axi_dmac/dest_axi_stream.v
M_DEPS += ../../../library/axi_dmac/dest_fifo_inf.v
M_DEPS += ../../../library/axi_dmac/inc_id.h
M_DEPS += ../../../library/axi_dmac/request_arb.v
M_DEPS += ../../../library/axi_dmac/request_generator.v
M_DEPS += ../../../library/axi_dmac/resp.h
M_DEPS += ../../../library/axi_dmac/response_generator.v
M_DEPS += ../../../library/axi_dmac/response_handler.v
M_DEPS += ../../../library/axi_dmac/splitter.v
M_DEPS += ../../../library/axi_dmac/src_axi_mm.v
M_DEPS += ../../../library/axi_dmac/src_axi_stream.v
M_DEPS += ../../../library/axi_dmac/src_fifo_inf.v
M_DEPS += ../../../library/common/ad_addsub.v
M_DEPS += ../../../library/common/ad_datafmt.v
M_DEPS += ../../../library/common/ad_dds.v
M_DEPS += ../../../library/common/ad_dds_1.v
M_DEPS += ../../../library/common/ad_dds_sine.v
M_DEPS += ../../../library/common/ad_iqcor.v
M_DEPS += ../../../library/common/ad_mem.v
M_DEPS += ../../../library/common/ad_pnmon.v
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M_DEPS += ../../../library/common/ad_pps_receiver.v
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M_DEPS += ../../../library/common/ad_rst.v
M_DEPS += ../../../library/common/ad_tdd_control.v
M_DEPS += ../../../library/common/up_adc_channel.v
M_DEPS += ../../../library/common/up_adc_common.v
M_DEPS += ../../../library/common/up_axi.v
M_DEPS += ../../../library/common/up_clock_mon.v
M_DEPS += ../../../library/common/up_dac_channel.v
M_DEPS += ../../../library/common/up_dac_common.v
M_DEPS += ../../../library/common/up_delay_cntrl.v
M_DEPS += ../../../library/common/up_tdd_cntrl.v
M_DEPS += ../../../library/common/up_xfer_cntrl.v
M_DEPS += ../../../library/common/up_xfer_status.v
M_DEPS += ../../../library/scripts/adi_env.tcl
M_DEPS += ../../../library/scripts/adi_ip_alt.tcl
M_DEPS += ../../../library/util_axis_fifo/address_gray.v
M_DEPS += ../../../library/util_axis_fifo/address_gray_pipelined.v
M_DEPS += ../../../library/util_axis_fifo/address_sync.v
M_DEPS += ../../../library/util_axis_fifo/util_axis_fifo.v
M_DEPS += ../../../library/util_axis_resize/util_axis_resize.v
M_DEPS += ../../../library/util_cdc/sync_bits.v
M_DEPS += ../../../library/util_cdc/sync_gray.v
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M_DEPS += ../../../library/util_cpack/util_cpack.v
M_DEPS += ../../../library/util_cpack/util_cpack_dsf.v
M_DEPS += ../../../library/util_cpack/util_cpack_hw.tcl
M_DEPS += ../../../library/util_cpack/util_cpack_mux.v
M_DEPS += ../../../library/util_rfifo/util_rfifo.v
M_DEPS += ../../../library/util_rfifo/util_rfifo_constr.sdc
M_DEPS += ../../../library/util_rfifo/util_rfifo_hw.tcl
M_DEPS += ../../../library/util_upack/util_upack.v
M_DEPS += ../../../library/util_upack/util_upack_dmx.v
M_DEPS += ../../../library/util_upack/util_upack_dsf.v
M_DEPS += ../../../library/util_upack/util_upack_hw.tcl
M_DEPS += ../../../library/util_wfifo/util_wfifo.v
M_DEPS += ../../../library/util_wfifo/util_wfifo_constr.sdc
M_DEPS += ../../../library/util_wfifo/util_wfifo_hw.tcl
include ../../scripts/project-altera.mk