pluto_hdl_adi/projects/adrv9364z7020/ccpackrf_lvds/system_bd.tcl


source ../common/adrv9364z7020_bd.tcl
source ../common/ccpackrf_bd.tcl

cfg_ad9361_interface LVDS

create_bd_port -dir O sys_cpu_clk_out
ad_connect  sys_cpu_clk sys_cpu_clk_out

set_property CONFIG.ADC_INIT_DELAY 30 [get_bd_cells axi_ad9361]
ccbox- copy 2016-10-17 18:09:14 +00:00
adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 14:20:23 +00:00			`source ../common/adrv9364z7020_bd.tcl`
adrv9364z7020: Rename box project to packrf 2019-10-23 14:15:03 +00:00			`source ../common/ccpackrf_bd.tcl`
ccbox- copy 2016-10-17 18:09:14 +00:00
pzsdr1/ccbox- updates 2016-11-17 21:14:28 +00:00			`cfg_ad9361_interface LVDS`

adrv936x/ccbox_lvds: unconnected clock for ad9361 input protection The 9361 protection circuits have no clocks connected, export the clock from the block design for them. 2018-08-09 09:27:17 +00:00			`create_bd_port -dir O sys_cpu_clk_out`
			`ad_connect sys_cpu_clk sys_cpu_clk_out`

ad9361- delay initialization 2017-03-15 16:06:49 +00:00			`set_property CONFIG.ADC_INIT_DELAY 30 [get_bd_cells axi_ad9361]`