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pluto_hdl_adi/docs/library/template_framework/template_module.rst

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docs: Include sphinx documentation The parameters directive allows to almost automatically generate the parameters table. It allows to add rich descriptions to the parameters, such as references, while checking if they exist in the *_hw.tcl file a obtaining the types and default values. However, it cannot obtain parameters generated from a foreach loop yet, making it incompatible with the axi_dmac_hw.tcl file for example. This commit also joins the other extensions into a single adi_links extension. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-08-16 12:57:14 +00:00
.. _template_framework module:
Template Module
================================================================================
docs: Add component diagram generator Replaces Symbolator with custom component diagram generator for more reliable diagrams. It uses the IP-XACT file, if it is not found, a placeholder is added instead. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-12-04 22:57:35 +00:00
.. hdl-component-diagram::
:path: library/spi_engine/spi_engine_execution
docs: Include sphinx documentation The parameters directive allows to almost automatically generate the parameters table. It allows to add rich descriptions to the parameters, such as references, while checking if they exist in the *_hw.tcl file a obtaining the types and default values. However, it cannot obtain parameters generated from a foreach loop yet, making it incompatible with the axi_dmac_hw.tcl file for example. This commit also joins the other extensions into a single adi_links extension. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-08-16 12:57:14 +00:00
The {module name} is responsible for {brief description}.
Files
-------------------------------------------------------------------------------
.. list-table::
:widths: 25 75
:header-rows: 1
* - Name
- Description
docs: links, drop part, fixups, codeowners Drop part role, use generic adi instead for root adi domain links. For future reference, the snipped used was: find ./docs/projects -type f -exec sed -i 's/:part:/:adi:/g' {} \; Drop Containerfile. Add option to validate links status (e.g. 200, 404), intended mostly for CI use to check if a page has disappeared from the internet. Validate links uses coroutines to launch multiple tasks concurrently, but do it in bundles to avoid being rate limited. Fixup regmap styling. Add imoldovan, jmarques, spop, lbarbosa as docs codeowners. Remove branch field for links to the hdl repo. Change git role to display full path. Fixup ZedBoard link label, remove IP List, add SYSID_ROM dokuwiki link in ad716_sdz project. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-11-13 15:42:46 +00:00
* - :git-hdl:`library/spi_engine/spi_engine_execution/spi_engine_execution.v`
docs: Include sphinx documentation The parameters directive allows to almost automatically generate the parameters table. It allows to add rich descriptions to the parameters, such as references, while checking if they exist in the *_hw.tcl file a obtaining the types and default values. However, it cannot obtain parameters generated from a foreach loop yet, making it incompatible with the axi_dmac_hw.tcl file for example. This commit also joins the other extensions into a single adi_links extension. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-08-16 12:57:14 +00:00
- Verilog source for the peripheral.
docs: links, drop part, fixups, codeowners Drop part role, use generic adi instead for root adi domain links. For future reference, the snipped used was: find ./docs/projects -type f -exec sed -i 's/:part:/:adi:/g' {} \; Drop Containerfile. Add option to validate links status (e.g. 200, 404), intended mostly for CI use to check if a page has disappeared from the internet. Validate links uses coroutines to launch multiple tasks concurrently, but do it in bundles to avoid being rate limited. Fixup regmap styling. Add imoldovan, jmarques, spop, lbarbosa as docs codeowners. Remove branch field for links to the hdl repo. Change git role to display full path. Fixup ZedBoard link label, remove IP List, add SYSID_ROM dokuwiki link in ad716_sdz project. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-11-13 15:42:46 +00:00
* - :git-hdl:`library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl`
docs: Include sphinx documentation The parameters directive allows to almost automatically generate the parameters table. It allows to add rich descriptions to the parameters, such as references, while checking if they exist in the *_hw.tcl file a obtaining the types and default values. However, it cannot obtain parameters generated from a foreach loop yet, making it incompatible with the axi_dmac_hw.tcl file for example. This commit also joins the other extensions into a single adi_links extension. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-08-16 12:57:14 +00:00
- TCL script to generate the Vivado IP-integrator project for the peripheral.
Configuration Parameters
--------------------------------------------------------------------------------
.. hdl-parameters::
:path: library/spi_engine/spi_engine_interconnect
* - DATA_WIDTH
- Data width of the parallel SDI/SDO data interfaces.
Signal and Interface Pins
--------------------------------------------------------------------------------
docs: add regmap directive Automate table generation for register maps. Based on tfcollins' vger python scripts. There are docs/adi_regmap_*.txt with more than one regmap per file, so the logic changed to allow that. Using title tool as the unique identifier now. It has a global option to set the default state (hidden or visible) for the collpasible tables. Also remove CSVs. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-08-07 19:31:41 +00:00
.. hdl-interfaces::
:path: library/spi_engine/spi_engine_interconnect
docs: Include sphinx documentation The parameters directive allows to almost automatically generate the parameters table. It allows to add rich descriptions to the parameters, such as references, while checking if they exist in the *_hw.tcl file a obtaining the types and default values. However, it cannot obtain parameters generated from a foreach loop yet, making it incompatible with the axi_dmac_hw.tcl file for example. This commit also joins the other extensions into a single adi_links extension. Signed-off-by: Jorge Marques <jorge.marques@analog.com>
2023-08-16 12:57:14 +00:00
Theory of Operation
--------------------------------------------------------------------------------
The {module name} module implements {brief description}.
.. image:: ../spi_engine/spi_engine.svg