zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
pluto_hdl_adi/library/jesd204/jesd204_rx/jesd204_rx_ooc.ttcl

23 lines
962 B
Plaintext
Raw Normal View History

Add copyright & license for all files needing ADI JESD specific license * Added every year when the file was edited, with comma * Range if it's consecutive years Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-08-18 07:55:04 +00:00
###############################################################################
## Copyright (C) 2017-2019, 2021 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIJESD204
###############################################################################
jesd204: Add out of context constraint file for link layer cores For the out of context flow it is important to have all clocks defined at the interface, especially if the clock are used in the other constraints.
2021-04-21 12:53:45 +00:00
<: setFileUsedIn { out_of_context synthesis implementation } :>
<: ;#Component and file information :>
<: set ComponentName [getComponentNameString] :>
<: setOutputDirectory "./" :>
<: setFileName $ComponentName :>
<: setFileExtension "_ooc.xdc" :>
# This XDC is used only for OOC mode of synthesis, implementation.
# These are default values for timing driven synthesis during OOC flow.
# These values will be overwritten during implementation with information
# from top level.
create_clock -name clk -period 2.5 [get_ports clk]
create_clock -name device_clk -period 2.5 [get_ports device_clk]
################################################################################