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pluto_hdl_adi/projects/pzsdr1/ccbrk_cmos/system_bd.tcl

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Tcl
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pzsdr1- cmos mode
2016-04-11 19:58:29 +00:00
pzsdr1/ccbrk_cmos- updates
2016-11-17 20:32:49 +00:00
source ../common/pzsdr1_bd.tcl
pzsdr1- cmos mode
2016-04-11 19:58:29 +00:00
source ../common/ccbrk_bd.tcl
pzsdr1: ccbrk_cmos, fix clkdiv parameters
2017-01-18 10:04:04 +00:00
set_property -dict [list CONFIG.SEL_0_DIV {2}] $clkdiv
set_property -dict [list CONFIG.SEL_1_DIV {1}] $clkdiv
pzsdr1: Added FIFOs for DAC and ADC paths so that they work at l_clk or l_clk/2
2017-01-18 10:01:24 +00:00
pzsdr1/ccbrk_cmos- updates
2016-11-17 20:32:49 +00:00
cfg_ad9361_interface CMOS
pzsdr1- cmos mode
2016-04-11 19:58:29 +00:00
ad9361- delay initialization
2017-03-15 16:06:49 +00:00
set_property CONFIG.ADC_INIT_DELAY 30 [get_bd_cells axi_ad9361]