89 lines
3.7 KiB
Tcl
89 lines
3.7 KiB
Tcl
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create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 spi
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# create a SPI Engine architecture
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create_bd_cell -type hier spi
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current_bd_instance /spi
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create_bd_pin -dir I -type clk clk
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create_bd_pin -dir I -type rst resetn
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create_bd_pin -dir O irq
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create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
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create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE
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set spi_engine [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_execution:1.0 execution]
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set axi_spi_engine [create_bd_cell -type ip -vlnv analog.com:user:axi_spi_engine:1.0 axi]
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set spi_engine_offload [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_offload:1.0 offload]
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set spi_engine_interconnect [create_bd_cell -type ip -vlnv analog.com:user:spi_engine_interconnect:1.0 interconnect]
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set util_sigma_delta_spi [create_bd_cell -type ip -vlnv analog.com:user:util_sigma_delta_spi:1.0 util_sigma_delta_spi]
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set_property -dict [list CONFIG.DATA_WIDTH 16] $spi_engine_offload
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set_property -dict [list CONFIG.DATA_WIDTH 16] $axi_spi_engine
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set_property -dict [list CONFIG.DATA_WIDTH 16] $spi_engine_interconnect
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set_property -dict [list CONFIG.DATA_WIDTH 16] $spi_engine
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set_property -dict [list CONFIG.NUM_OF_CS 1] $spi_engine
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set_property -dict [list CONFIG.NUM_OF_CS 1] $util_sigma_delta_spi
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set_property -dict [list CONFIG.NUM_OFFLOAD 1] $axi_spi_engine
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ad_connect axi/spi_engine_offload_ctrl0 offload/spi_engine_offload_ctrl
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ad_connect offload/spi_engine_ctrl interconnect/s0_ctrl
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ad_connect axi/spi_engine_ctrl interconnect/s1_ctrl
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ad_connect interconnect/m_ctrl execution/ctrl
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ad_connect offload/offload_sdi M_AXIS_SAMPLE
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ad_connect util_sigma_delta_spi/data_ready offload/trigger
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ad_connect execution/active util_sigma_delta_spi/spi_active
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ad_connect execution/spi util_sigma_delta_spi/s_spi
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ad_connect util_sigma_delta_spi/m_spi m_spi
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ad_connect clk offload/spi_clk
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ad_connect clk offload/ctrl_clk
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ad_connect clk execution/clk
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ad_connect clk axi/s_axi_aclk
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ad_connect clk axi/spi_clk
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ad_connect clk interconnect/clk
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ad_connect clk util_sigma_delta_spi/clk
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ad_connect axi/spi_resetn offload/spi_resetn
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ad_connect axi/spi_resetn execution/resetn
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ad_connect axi/spi_resetn interconnect/resetn
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ad_connect axi/spi_resetn util_sigma_delta_spi/resetn
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ad_connect resetn axi/s_axi_aresetn
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ad_connect irq axi/irq
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current_bd_instance /
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set axi_adaq7980_dma [create_bd_cell -type ip -vlnv analog.com:user:axi_dmac:1.0 axi_adaq7980_dma]
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set_property -dict [list CONFIG.DMA_TYPE_SRC {1}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.DMA_TYPE_DEST {0}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.CYCLIC {0}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.SYNC_TRANSFER_START {0}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.AXI_SLICE_SRC {0}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.AXI_SLICE_DEST {1}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.DMA_2D_TRANSFER {0}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_SRC {16}] $axi_adaq7980_dma
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set_property -dict [list CONFIG.DMA_DATA_WIDTH_DEST {64}] $axi_adaq7980_dma
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ad_connect sys_cpu_clk spi/clk
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ad_connect sys_cpu_resetn spi/resetn
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ad_connect sys_cpu_resetn axi_adaq7980_dma/m_dest_axi_aresetn
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ad_connect spi/m_spi spi
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ad_connect axi_adaq7980_dma/s_axis spi/M_AXIS_SAMPLE
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ad_cpu_interconnect 0x44a00000 spi/axi
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ad_cpu_interconnect 0x44a30000 axi_adaq7980_dma
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ad_connect sys_cpu_clk axi_adaq7980_dma/s_axis_aclk
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ad_cpu_interrupt "ps-13" "mb-13" axi_adaq7980_dma/irq
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ad_cpu_interrupt "ps-12" "mb-12" spi/irq
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ad_mem_hp2_interconnect sys_cpu_clk sys_ps7/S_AXI_HP2
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ad_mem_hp2_interconnect sys_cpu_clk axi_adaq7980_dma/m_dest_axi
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