2022-10-27 18:35:12 +00:00
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# AD7606X-FMC HDL Project
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Here are some pointers to help you:
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* [EVAL-AD7606B Product Page](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad7606b-fmcz.html)
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* [EVAL-AD7606C-16/18 Product Page](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad7606c-18.html)
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* Parts : AD7606B [8 Channels, 16-bit, 800 kSPS Bipolar Input, Simultaneous sampling ADC](https://www.analog.com/en/products/ad7606b.html)
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* Parts : AD7606C-16 [8 Channels, 16-bit, 1 MSPS Bipolar Input, Simultaneous sampling ADC](https://www.analog.com/en/products/ad7606c-16.html)
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* Parts : AD7606B [8 Channels, 18-bit, 1 MSPS Bipolar Input, Simultaneous sampling ADC](https://www.analog.com/en/products/ad7606c-18.html)
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* Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmcz
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* HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad7606x-fmc/hdl
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2023-06-16 11:17:24 +00:00
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* NO-OS Drivers: [AD7606 - No-OS Driver](https://wiki.analog.com/resources/tools-software/uc-drivers/ad7606)
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2022-10-27 18:35:12 +00:00
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* Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/axi-adc-hdl
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## Building, Generating Bit Files
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IMPORTANT: Set AD7606X device model, ADC Read Mode option and external clock option
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How to use over-writable parameters from the environment:
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```
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hdl/projects/ad7606x_fmc/zed> make DEV_CONFIG=0 SIMPLE_STATUS_CRC=0
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DEV_CONFIG - Defines the device which will be used: 0 - AD7606B, 1 - AD7606C-16, 2 - AD7606C-18.
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SIMPLE_STATUS_CRC - Defines the ADC Read Mode option: 0 - Simple, 1 - STATUS, 2 - CRC, 3 - CRC_STATUS.
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EXT_CLK - Defines the external clock option for the ADC clock: 0 - No, 1 - Yes.
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