2017-05-25 14:47:19 +00:00
|
|
|
# ADRV1CRR SDR SOM
|
2016-11-15 19:15:55 +00:00
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
This folder contains the ADRV1CRR SOM projects for each of the carrier boards.
|
2016-11-15 19:15:55 +00:00
|
|
|
|
|
|
|
## Board Design Files
|
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
| Directory/File | Description |
|
|
|
|
|-----------------------------|----------------------------------------|
|
|
|
|
| common/adrv9361z7035_bd.tcl | ADRV1CRR SOM module board design file. |
|
|
|
|
| common/ccbob_bd.tcl | carrier, break out board design file. |
|
|
|
|
| common/ccfmc_bd.tcl | carrier, fmc board design file. |
|
|
|
|
| common/ccpci_bd.tcl | carrier, pci-e board design file. |
|
|
|
|
| common/ccusb_bd.tcl | carrier, usb board design file. |
|
2016-11-15 19:16:46 +00:00
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.
|
2016-11-15 19:15:55 +00:00
|
|
|
|
|
|
|
## Board Constraint Files
|
2016-11-15 21:15:55 +00:00
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
| Directory/File | Description |
|
|
|
|
|--------------------------------------|-----------------------------------------------|
|
|
|
|
| common/adrv9361z7035_constr.xdc | ADRV1CRR SOM base constraints file. |
|
|
|
|
| common/adrv9361z7035_constr_cmos.xdc | ADRV1CRR SOM CMOS mode constraints file. |
|
|
|
|
| common/adrv9361z7035_constr_lvds.xdc | ADRV1CRR SOM LVDS mode constraints file. |
|
|
|
|
| common/ccbob_constr.xdc | carrier, break out board constraints file. |
|
|
|
|
| common/ccfmc_constr.xdc | carrier, fmc board constraints file. |
|
|
|
|
| common/ccpci_constr.xdc | carrier, pci-e board constraints file. |
|
|
|
|
| common/ccusb_constr.xdc | carrier, usb board constraints file. |
|
2016-11-15 19:15:55 +00:00
|
|
|
|
2016-11-15 21:15:55 +00:00
|
|
|
FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.
|
2016-11-15 19:15:55 +00:00
|
|
|
|
2016-11-15 21:15:55 +00:00
|
|
|
## Building, Generating Bit Files
|
2016-11-16 09:04:43 +00:00
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
[adrv9361z7035] cd ccbob_cmos
|
2016-11-15 19:15:55 +00:00
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
[adrv9361z7035/ccbob_cmos] make
|
2016-11-15 21:15:55 +00:00
|
|
|
|
2017-05-25 14:47:19 +00:00
|
|
|
The make in each carrier directory builds the corresponding project. The above example builds ADRV1CRR-BOB hardware bit files in CMOS mode.
|
2016-11-15 19:15:55 +00:00
|
|
|
|
2016-11-15 21:15:55 +00:00
|
|
|
## Documentation
|
2016-11-16 09:04:43 +00:00
|
|
|
|
2016-11-16 08:57:39 +00:00
|
|
|
* [HDL Design User Guide]
|
|
|
|
* [IP User Guide]
|
2017-05-25 14:47:19 +00:00
|
|
|
* [ADRV1CRR Wiki page]
|
2016-11-16 08:57:39 +00:00
|
|
|
|
|
|
|
[HDL Design User Guide]:http://wiki.analog.com/resources/fpga/docs/hdl
|
|
|
|
[IP User Guide]:http://wiki.analog.com/resources/fpga/docs/axi_ad9361
|
2017-05-25 14:47:19 +00:00
|
|
|
[ADRV1CRR Wiki page]:https://wiki.analog.com/resources/eval/user-guides/picozed_sdr
|
2016-11-15 19:15:55 +00:00
|
|
|
|