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pluto_hdl_adi/projects/ad9082_fmca_ebz/vck190/system_bd.tcl

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Add copyright and license to .tcl, .ttcl files Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-06 12:08:22 +00:00
###############################################################################
## Copyright (C) 2023-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
ad9082/vck190: Add initial design ADC Mode 27: L=8, M=4, S=4, NP=12, LaneRate=24.75 GSPS DAC Mode 35: L=8, M=4, S=4, NP=12, LaneRate=24.75 GSPS Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
2023-05-11 11:03:25 +00:00
source $ad_hdl_dir/projects/ad9081_fmca_ebz/vck190/system_bd.tcl