46 lines
1.6 KiB
Makefile
46 lines
1.6 KiB
Makefile
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####################################################################################
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## Copyright (c) 2018 - 2021 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := ad9081_fmca_ebz_vcu128
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M_DEPS += timing_constr.xdc
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M_DEPS += ../../scripts/adi_pd.tcl
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M_DEPS += ../../common/xilinx/data_offload_bd.tcl
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M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
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M_DEPS += ../../common/xilinx/adcfifo_bd.tcl
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M_DEPS += ../../common/vcu128/vcu128_system_constr.xdc
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M_DEPS += ../../common/vcu128/vcu128_system_bd.tcl
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M_DEPS += ../../ad9081_fmca_ebz/common/versal_transceiver.tcl
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M_DEPS += ../../ad9081_fmca_ebz/common/ad9081_fmca_ebz_bd.tcl
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M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
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M_DEPS += ../../../library/common/ad_iobuf.v
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M_DEPS += ../../../library/common/ad_edge_detect.v
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M_DEPS += ../../../library/common/ad_3w_spi.v
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LIB_DEPS += axi_dmac
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LIB_DEPS += axi_sysid
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LIB_DEPS += axi_tdd
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LIB_DEPS += data_offload
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LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
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LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
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LIB_DEPS += jesd204/axi_jesd204_rx
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LIB_DEPS += jesd204/axi_jesd204_tx
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LIB_DEPS += jesd204/jesd204_rx
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LIB_DEPS += jesd204/jesd204_tx
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LIB_DEPS += jesd204/jesd204_versal_gt_adapter_rx
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LIB_DEPS += jesd204/jesd204_versal_gt_adapter_tx
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LIB_DEPS += sysid_rom
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LIB_DEPS += util_adcfifo
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LIB_DEPS += util_dacfifo
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LIB_DEPS += util_fifo2axi_bridge
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LIB_DEPS += util_pack/util_cpack2
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LIB_DEPS += util_pack/util_upack2
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LIB_DEPS += util_tdd_sync
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LIB_DEPS += xilinx/axi_adxcvr
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LIB_DEPS += xilinx/util_adxcvr
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include ../../scripts/project-xilinx.mk
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