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pluto_hdl_adi/projects/fmcomms5/zcu102/system_bd.tcl

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FMCOMMS5/ZCU102 : Merge from njpillitteri/hdl:dev Pull request Dev #26
2017-01-13 12:47:16 +00:00
source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl
zcu102/*- actual clock == desired clock
2017-02-06 17:53:47 +00:00
set_property CONFIG.PSU__FPGA_PL2_ENABLE {1} $sys_ps8
set_property CONFIG.PSU__CRL_APB__PL2_REF_CTRL__FREQMHZ {200} $sys_ps8
set_property CONFIG.PSU__CRL_APB__PL2_REF_CTRL__DIVISOR0 {3} $sys_ps8
set_property CONFIG.PSU__CRL_APB__PL2_REF_CTRL__DIVISOR1 {2} $sys_ps8
FMCOMMS5/ZCU102 : Merge from njpillitteri/hdl:dev Pull request Dev #26
2017-01-13 12:47:16 +00:00
ad_connect sys_dma_clk sys_ps8/pl_clk2
source ../common/fmcomms5_bd.tcl
set_property CONFIG.DEVICE_TYPE 2 [get_bd_cells axi_ad9361_0]
ad9361- delay initialization
2017-03-15 16:06:49 +00:00
set_property CONFIG.ADC_INIT_DELAY 8 [get_bd_cells axi_ad9361_0]
FMCOMMS5/ZCU102 : Merge from njpillitteri/hdl:dev Pull request Dev #26
2017-01-13 12:47:16 +00:00
set_property CONFIG.DEVICE_TYPE 2 [get_bd_cells axi_ad9361_1]
ad9361- delay initialization
2017-03-15 16:06:49 +00:00
set_property CONFIG.ADC_INIT_DELAY 8 [get_bd_cells axi_ad9361_1]
zcu102: Update project to include clkdiv
2017-01-16 12:47:31 +00:00
set_property -dict [list CONFIG.SIM_DEVICE {ULTRASCALE}] $clkdiv