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pluto_hdl_adi/projects/adrv9371x/a10gx/Makefile

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adrv9371x: Initial commit -need to fix dc filter module for AD9371 / altera
2016-08-16 12:50:46 +00:00
####################################################################################
Makefiles: Update header with the appropriate license
2021-09-15 15:03:11 +00:00
## Copyright (c) 2018 - 2021 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
adrv9371x: Initial commit -need to fix dc filter module for AD9371 / altera
2016-08-16 12:50:46 +00:00
## Auto-generated, do not modify!
####################################################################################
Regenerate project Makefiles using the new shared Makefile includes This reduces the amount of boilerplate code that is present in these Makefiles by a lot. It also makes it possible to update the Makefile rules in future without having to re-generate all the Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:13:48 +00:00
PROJECT_NAME := adrv9371x_a10gx
adrv9371x: Initial commit -need to fix dc filter module for AD9371 / altera
2016-08-16 12:50:46 +00:00
M_DEPS += ../common/adrv9371x_qsys.tcl
makefile: Regenerate make files
2020-11-16 17:59:27 +00:00
M_DEPS += ../../scripts/adi_pd.tcl
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
M_DEPS += ../../common/intel/dacfifo_qsys.tcl
adrv9371x: Initial commit -need to fix dc filter module for AD9371 / altera
2016-08-16 12:50:46 +00:00
M_DEPS += ../../common/a10gx/a10gx_system_qsys.tcl
M_DEPS += ../../common/a10gx/a10gx_system_assign.tcl
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
LIB_DEPS += axi_dmac
makefile: Regenerate make files
2020-10-14 08:32:43 +00:00
LIB_DEPS += axi_sysid
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
LIB_DEPS += intel/adi_jesd204
makefile: Regenerate make files
2020-10-14 08:32:43 +00:00
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += sysid_rom
adrv9371x: Use new pack/unpack infrastructure Use the new util_cpack2 and util_upack2 cores. They have lower utilization that the old util_cpack and util_upack cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-10-04 10:35:14 +00:00
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2
adrv9371x: Initial commit -need to fix dc filter module for AD9371 / altera
2016-08-16 12:50:46 +00:00
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
include ../../scripts/project-intel.mk