2021-08-27 11:14:07 +00:00
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source ../common/adrv9009zu11eg_bd.tcl
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source ../common/adrv2crr_fmc_bd.tcl
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
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ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
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ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
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sysid_gen_sys_init_file
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# iic
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_1
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_2
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ad_ip_instance axi_iic axi_iic_1
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ad_connect iic_1 axi_iic_1/iic
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ad_ip_instance axi_iic axi_iic_2
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ad_connect iic_2 axi_iic_2/iic
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# spi
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create_bd_port -dir O -from 7 -to 0 spi1_csn_o
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create_bd_port -dir I -from 7 -to 0 spi1_csn_i
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create_bd_port -dir I spi1_clk_i
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create_bd_port -dir O spi1_clk_o
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create_bd_port -dir I spi1_sdo_i
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create_bd_port -dir O spi1_sdo_o
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create_bd_port -dir I spi1_sdi_i
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ad_ip_instance axi_quad_spi axi_spi1
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ad_ip_parameter axi_spi1 CONFIG.C_USE_STARTUP 0
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ad_ip_parameter axi_spi1 CONFIG.C_NUM_SS_BITS 8
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ad_ip_parameter axi_spi1 CONFIG.C_SCK_RATIO 16
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ad_connect spi1_csn_i axi_spi1/ss_i
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ad_connect spi1_csn_o axi_spi1/ss_o
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ad_connect spi1_clk_i axi_spi1/sck_i
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ad_connect spi1_clk_o axi_spi1/sck_o
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ad_connect spi1_sdo_i axi_spi1/io0_i
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ad_connect spi1_sdo_o axi_spi1/io0_o
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ad_connect spi1_sdi_i axi_spi1/io1_i
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set_property -dict [list CONFIG.PSU__FPGA_PL3_ENABLE {1} CONFIG.PSU__CRL_APB__PL3_REF_CTRL__SRCSEL {IOPLL} CONFIG.PSU__CRL_APB__PL3_REF_CTRL__FREQMHZ {8}] [get_bd_cells sys_ps8]
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ad_connect sys_ps8/pl_clk3 axi_spi1/ext_spi_clk
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create_bd_port -dir O -from 7 -to 0 spi2_csn_o
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create_bd_port -dir I -from 7 -to 0 spi2_csn_i
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create_bd_port -dir I spi2_clk_i
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create_bd_port -dir O spi2_clk_o
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create_bd_port -dir I spi2_sdo_i
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create_bd_port -dir O spi2_sdo_o
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create_bd_port -dir I spi2_sdi_i
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ad_ip_instance axi_quad_spi axi_spi2
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ad_ip_parameter axi_spi2 CONFIG.C_USE_STARTUP 0
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ad_ip_parameter axi_spi2 CONFIG.C_NUM_SS_BITS 8
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ad_ip_parameter axi_spi2 CONFIG.C_SCK_RATIO 16
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ad_connect spi2_csn_i axi_spi2/ss_i
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ad_connect spi2_csn_o axi_spi2/ss_o
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ad_connect spi2_clk_i axi_spi2/sck_i
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ad_connect spi2_clk_o axi_spi2/sck_o
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ad_connect spi2_sdo_i axi_spi2/io0_i
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ad_connect spi2_sdo_o axi_spi2/io0_o
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ad_connect spi2_sdi_i axi_spi2/io1_i
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ad_connect axi_spi2/ext_spi_clk sys_ps8/pl_clk3
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# gpio
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create_bd_port -dir I -from 31 -to 0 xmicrowave_gpio0_i
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create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio0_o
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create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio0_t
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create_bd_port -dir I -from 31 -to 0 xmicrowave_gpio1_i
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create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio1_o
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create_bd_port -dir O -from 31 -to 0 xmicrowave_gpio1_t
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ad_ip_instance axi_gpio axi_xmicrowave_gpio
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ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_IS_DUAL 1
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ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_GPIO_WIDTH 32
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ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_GPIO2_WIDTH 32
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ad_ip_parameter axi_xmicrowave_gpio CONFIG.C_INTERRUPT_PRESENT 1
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ad_connect xmicrowave_gpio0_i axi_xmicrowave_gpio/gpio_io_i
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ad_connect xmicrowave_gpio0_o axi_xmicrowave_gpio/gpio_io_o
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ad_connect xmicrowave_gpio0_t axi_xmicrowave_gpio/gpio_io_t
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ad_connect xmicrowave_gpio1_i axi_xmicrowave_gpio/gpio2_io_i
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ad_connect xmicrowave_gpio1_o axi_xmicrowave_gpio/gpio2_io_o
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ad_connect xmicrowave_gpio1_t axi_xmicrowave_gpio/gpio2_io_t
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# AXI address definitions
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ad_cpu_interconnect 0x43000000 axi_iic_1
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ad_cpu_interconnect 0x43100000 axi_iic_2
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ad_cpu_interconnect 0x44000000 axi_spi1
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ad_cpu_interconnect 0x44500000 axi_spi2
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ad_cpu_interconnect 0x46000000 axi_xmicrowave_gpio
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# interrupts
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ad_cpu_interrupt "ps-1" "mb-1" axi_iic_1/iic2intc_irpt
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2021-12-16 09:29:38 +00:00
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ad_cpu_interrupt "ps-2" "mb-2" axi_iic_2/iic2intc_irpt
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2021-08-27 11:14:07 +00:00
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ad_cpu_interrupt "ps-3" "mb-3" axi_spi1/ip2intc_irpt
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ad_cpu_interrupt "ps-4" "mb-4" axi_spi2/ip2intc_irpt
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ad_cpu_interrupt "ps-5" "mb-5" axi_xmicrowave_gpio/ip2intc_irpt
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