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pluto_hdl_adi/projects/scripts/project-intel.mk

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Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
####################################################################################
Make system: Be explicit in license that cover the make/build system The build system is covered under a 1 Clause BSD license. Make sure users are aware. Signed-off-by: Robin Getz <robin.getz@analog.com>
2021-09-13 20:50:01 +00:00
## Copyright (c) 2020 - 2021 Analog Devices, Inc.
## SPDX short identifier: BSD-1-Clause
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
####################################################################################
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
# Assumes this file is in projects/scripts/project-intel.mk
HDL_PROJECT_PATH := $(subst scripts/project-intel.mk,,$(lastword $(MAKEFILE_LIST)))
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
HDL_LIBRARY_PATH := $(HDL_PROJECT_PATH)../library/
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
Add quiet mode to the Makefile system The standard Makefile output is very noisy and it can be difficult to filter the interesting information from this noise. In quiet mode the standard Makefile output will be suppressed and instead a short human readable description of the current task is shown. E.g. > make adv7511.zed Building axi_clkgen library [library/axi_clkgen/axi_clkgen_ip.log] ... OK Building axi_hdmi_tx library [library/axi_hdmi_tx/axi_hdmi_tx_ip.log] ... OK Building axi_i2s_adi library [library/axi_i2s_adi/axi_i2s_adi_ip.log] ... OK Building axi_spdif_tx library [library/axi_spdif_tx/axi_spdif_tx_ip.log] ... OK Building util_i2c_mixer library [library/util_i2c_mixer/util_i2c_mixer_ip.log] ... OK Building adv7511_zed project [projects/adv7511/zed/adv7511_zed_vivado.log] ... OK Quiet mode is enabled by default since it generates a more human readable output. It can be disabled by passing VERBOSE=1 to make or setting the VERBOSE environment variable to 1 before calling make. E.g. > make adv7511.zed VERBOSE=1 make[1]: Entering directory 'library/axi_clkgen' rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil .timestamp_altera vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1 ... Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-25 07:21:37 +00:00
include $(HDL_PROJECT_PATH)../quiet.mk
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
ifeq ($(NIOS2_MMU),)
NIOS2_MMU := 1
endif
scripts/adi_project_intel: Rename ALT_NIOS_MMU_ENABLED to NIOS_MMU_ENABLED
2018-08-14 14:40:42 +00:00
export NIOS_MMU_ENABLED := $(NIOS2_MMU)
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
INTEL := quartus_sh --64bit -t
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
CLEAN_TARGET += *.log
CLEAN_TARGET += *_INFO.txt
CLEAN_TARGET += *_dump.txt
CLEAN_TARGET += db
CLEAN_TARGET += *.asm.rpt
CLEAN_TARGET += *.done
CLEAN_TARGET += *.eda.rpt
CLEAN_TARGET += *.fit.*
CLEAN_TARGET += *.map.*
CLEAN_TARGET += *.sta.*
scripts/project_intel.mk: Update CLEAN targets
2020-03-31 09:18:21 +00:00
CLEAN_TARGET += *.syn.*
CLEAN_TARGET += *.retime.*
CLEAN_TARGET += *.flow.*
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
CLEAN_TARGET += *.qsf
CLEAN_TARGET += *.qpf
CLEAN_TARGET += *.qws
CLEAN_TARGET += *.sof
CLEAN_TARGET += *.cdf
CLEAN_TARGET += *.sld
CLEAN_TARGET += *.qdf
scripts/project_intel.mk: Update CLEAN targets
2020-03-31 09:18:21 +00:00
CLEAN_TARGET += *.bin
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
CLEAN_TARGET += hc_output
CLEAN_TARGET += system_bd
CLEAN_TARGET += hps_isw_handoff
CLEAN_TARGET += hps_sdram_*.csv
CLEAN_TARGET += *ddr3_*.csv
CLEAN_TARGET += incremental_db
CLEAN_TARGET += reconfig_mif
CLEAN_TARGET += *.sopcinfo
CLEAN_TARGET += *.jdi
CLEAN_TARGET += *.pin
scripts/project_intel.mk: Update CLEAN targets
2020-03-31 09:18:21 +00:00
CLEAN_TARGET += qdb
CLEAN_TARGET += ip
CLEAN_TARGET += synth_dumps
CLEAN_TARGET += tmp-clearbox
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
CLEAN_TARGET += *_summary.csv
CLEAN_TARGET += *.dpf
project-*.mk Update CLEAN targets
2018-03-28 09:44:21 +00:00
CLEAN_TARGET += system_qsys_script.tcl
CLEAN_TARGET += system_bd.qsys
CLEAN_TARGET += .qsys_edit
scripts/project-intel: Update CLEAN target
2020-03-05 12:56:43 +00:00
CLEAN_TARGET += *.rpt
CLEAN_TARGET += *.smsg
CLEAN_TARGET += *.summary
CLEAN_TARGET += ip
CLEAN_TARGET += qdb
CLEAN_TARGET += tmp-clearbox
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
M_DEPS += system_top.v
M_DEPS += system_qsys.tcl
M_DEPS += system_project.tcl
M_DEPS += system_constr.sdc
M_DEPS += $(HDL_PROJECT_PATH)scripts/adi_tquest.tcl
project/scripts: Rename adi_project_alt.tcl to adi_project_intel.tcl
2018-08-14 08:44:56 +00:00
M_DEPS += $(HDL_PROJECT_PATH)scripts/adi_project_intel.tcl
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
M_DEPS += $(HDL_PROJECT_PATH)scripts/adi_env.tcl
project/scripts: Rename adi_project_alt.tcl to adi_project_intel.tcl
2018-08-14 08:44:56 +00:00
M_DEPS += $(foreach dep,$(LIB_DEPS),$(HDL_LIBRARY_PATH)$(dep)/.timestamp_intel)
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
.PHONY: all lib clean clean-all
all: lib $(PROJECT_NAME).sof
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
clean:
Add quiet mode to the Makefile system The standard Makefile output is very noisy and it can be difficult to filter the interesting information from this noise. In quiet mode the standard Makefile output will be suppressed and instead a short human readable description of the current task is shown. E.g. > make adv7511.zed Building axi_clkgen library [library/axi_clkgen/axi_clkgen_ip.log] ... OK Building axi_hdmi_tx library [library/axi_hdmi_tx/axi_hdmi_tx_ip.log] ... OK Building axi_i2s_adi library [library/axi_i2s_adi/axi_i2s_adi_ip.log] ... OK Building axi_spdif_tx library [library/axi_spdif_tx/axi_spdif_tx_ip.log] ... OK Building util_i2c_mixer library [library/util_i2c_mixer/util_i2c_mixer_ip.log] ... OK Building adv7511_zed project [projects/adv7511/zed/adv7511_zed_vivado.log] ... OK Quiet mode is enabled by default since it generates a more human readable output. It can be disabled by passing VERBOSE=1 to make or setting the VERBOSE environment variable to 1 before calling make. E.g. > make adv7511.zed VERBOSE=1 make[1]: Entering directory 'library/axi_clkgen' rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil .timestamp_altera vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1 ... Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-25 07:21:37 +00:00
$(call clean, \
$(CLEAN_TARGET), \
$(HL)$(PROJECT_NAME)$(NC) project)
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
clean-all: clean
@for lib in $(LIB_DEPS); do \
$(MAKE) -C $(HDL_LIBRARY_PATH)$${lib} clean; \
done
Add common project Makefile for Altera projects The project Makefiles for the Altera projects share most of their code. The only difference is the list of project dependencies. Create a file that has the common parts and can be included by the project Makefiles. This drastically reduces the size of the project Makefiles and also allows to change the Makefile implementation without having to re-generate all Makefiles. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-22 16:15:14 +00:00
$(PROJECT_NAME).sof: $(M_DEPS)
-rm -rf $(CLEAN_TARGET)
Add quiet mode to the Makefile system The standard Makefile output is very noisy and it can be difficult to filter the interesting information from this noise. In quiet mode the standard Makefile output will be suppressed and instead a short human readable description of the current task is shown. E.g. > make adv7511.zed Building axi_clkgen library [library/axi_clkgen/axi_clkgen_ip.log] ... OK Building axi_hdmi_tx library [library/axi_hdmi_tx/axi_hdmi_tx_ip.log] ... OK Building axi_i2s_adi library [library/axi_i2s_adi/axi_i2s_adi_ip.log] ... OK Building axi_spdif_tx library [library/axi_spdif_tx/axi_spdif_tx_ip.log] ... OK Building util_i2c_mixer library [library/util_i2c_mixer/util_i2c_mixer_ip.log] ... OK Building adv7511_zed project [projects/adv7511/zed/adv7511_zed_vivado.log] ... OK Quiet mode is enabled by default since it generates a more human readable output. It can be disabled by passing VERBOSE=1 to make or setting the VERBOSE environment variable to 1 before calling make. E.g. > make adv7511.zed VERBOSE=1 make[1]: Entering directory 'library/axi_clkgen' rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil .timestamp_altera vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1 ... Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-25 07:21:37 +00:00
$(call build,\
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
$(INTEL) system_project.tcl, \
Add quiet mode to the Makefile system The standard Makefile output is very noisy and it can be difficult to filter the interesting information from this noise. In quiet mode the standard Makefile output will be suppressed and instead a short human readable description of the current task is shown. E.g. > make adv7511.zed Building axi_clkgen library [library/axi_clkgen/axi_clkgen_ip.log] ... OK Building axi_hdmi_tx library [library/axi_hdmi_tx/axi_hdmi_tx_ip.log] ... OK Building axi_i2s_adi library [library/axi_i2s_adi/axi_i2s_adi_ip.log] ... OK Building axi_spdif_tx library [library/axi_spdif_tx/axi_spdif_tx_ip.log] ... OK Building util_i2c_mixer library [library/util_i2c_mixer/util_i2c_mixer_ip.log] ... OK Building adv7511_zed project [projects/adv7511/zed/adv7511_zed_vivado.log] ... OK Quiet mode is enabled by default since it generates a more human readable output. It can be disabled by passing VERBOSE=1 to make or setting the VERBOSE environment variable to 1 before calling make. E.g. > make adv7511.zed VERBOSE=1 make[1]: Entering directory 'library/axi_clkgen' rm -rf *.cache *.data *.xpr *.log component.xml *.jou xgui *.ip_user_files *.srcs *.hw *.sim .Xil .timestamp_altera vivado -mode batch -source axi_clkgen_ip.tcl >> axi_clkgen_ip.log 2>&1 ... Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-25 07:21:37 +00:00
$(PROJECT_NAME)_quartus.log, \
$(HL)$(PROJECT_NAME)$(NC))
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
lib:
@for lib in $(LIB_DEPS); do \
all: Rename altera to intel
2018-08-13 13:59:02 +00:00
$(MAKE) -C $(HDL_LIBRARY_PATH)$${lib} intel || exit $$?; \
Move Altera IP core dependency tracking to library Makefiles Currently the individual IP core dependencies are tracked inside the library Makefile for Xilinx IPs and the project Makefiles only reference the IP cores. For Altera on the other hand the individual dependencies are tracked inside the project Makefile. This leads to a lot of duplicated lists and also means that the project Makefiles need to be regenerated when one of the IP cores changes their files. Change the Altera projects to a similar scheme than the Xilinx projects. The projects themselves only reference the library as a whole as their dependency while the library Makefile references the individual source dependencies. Since on Altera there is no target that has to be generated create a dummy target called ".timestamp_altera" who's only purpose is to have a timestamp that is greater or equal to the timestamp of all of the IP core files. This means the project Makefile can have a dependency on this file and make sure that the project will be rebuild if any of the files in the library changes. This patch contains quite a bit of churn, but hopefully it reduces the amount of churn in the future when modifying Altera IP cores. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2018-03-27 09:21:09 +00:00
done