2023-08-16 12:57:14 +00:00
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HDL Reference Designs
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===============================================================================
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.. attention::
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Work-in-progress, not all content available at the
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`wiki <https://wiki.analog.com/resources/fpga/docs/build>`_
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2024-02-22 14:32:04 +00:00
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has been imported yet.
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2023-08-16 12:57:14 +00:00
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.. image:: sources/HDL_logo.svg
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:align: center
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:scale: 100%
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`Analog Devices Inc. <https://www.analog.com>`_
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HDL libraries and projects for various reference design and prototyping systems.
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This repository contains HDL code (Verilog or VHDL) and the required Tcl scripts
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to create and build a specific FPGA example design using Xilinx and/or Intel tool
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2024-01-29 12:41:13 +00:00
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chain.
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2024-02-22 14:32:04 +00:00
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.. hdl-build-status::
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Contents
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===============================================================================
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.. toctree::
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:maxdepth: 1
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user_guide/index
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library/index
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projects/index
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