288 lines
10 KiB
ReStructuredText
288 lines
10 KiB
ReStructuredText
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.. _ad738x_fmc:
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AD738x_FMC HDL project
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================================================================================
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Overview
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--------------------------------------------------------------------------------
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The :adi:`AD7380`/ :adi:`AD7381` are a 16-bit and 14-bit pin-compatible family
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of dual simultaneous sampling, high speed, low power, successive approximation
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register (SAR) analog-to-digital converters (ADCs) that operate from a 3.3 V
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power supply and feature throughput rates up to 4 MSPS.The analog input type is
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differential for the :adi:`AD7380`, :adi:`AD7381`, :adi:`AD4680`, :adi:`AD4681`,
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:adi:`AD7380-4`, :adi:`AD7389-4`, :adi:`AD7381-4` can accepts a wide common-mode
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input voltage, and is sampled and converted on the falling edge of CS.
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The :adi:`AD7383`, :adi:`AD7384`, :adi:`AD4682` and :adi:`AD4683` have the
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pseudo-differential input while the :adi:`AD7386`, :adi:`AD7387`, :adi:`AD7388`,
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:adi:`AD4684` and :adi:`AD4685` have single-ended input. The AD7380 family has
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optional integrated on-chip oversampling blocks to improve dynamic range and
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reduce noise at lower bandwidths. An internal 2.5 V reference is included.
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Alternatively, an external reference up to 3.3 V can be used.
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The conversion process and data acquisition use standard control inputs allowing
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for easy interfacing to microprocessors or DSPs. It is compatible with 1.8 V,
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2.5 V, and 3.3 V interfaces, using a separate logic supply.
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The dual :adi:`AD7380`, :adi:`AD7381`, :adi:`AD4680`, :adi:`AD4681`,
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:adi:`AD7383`, :adi:`AD7384`, :adi:`AD4682`, :adi:`AD4683`, :adi:`AD7386`,
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:adi:`AD7387`, :adi:`AD7388`, :adi:`AD4684` and :adi:`AD4685` family are
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available in a 16-lead 3mm x 3mm LFCSP package while the quad generics
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:adi:`AD7380-4`, :adi:`AD7389-4`, and :adi:`AD7381-4` are available in
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4mmx4mm LFCSP package. Both the duals and quad generic operate in specified
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from -40°C to +125°C temperature range.
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Applications:
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* Motor control position feedback
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* Motor control current sense
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* Data acquisition system
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* EDFA applications
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* I and Q demodulation
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* SONAR
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* Power Quality
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Supported boards
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-------------------------------------------------------------------------------
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- :adi:`EVAL-AD7380FMCZ <EVAL-AD7380FMCZ>`
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- :adi:`EVAL-AD7381FMCZ <EVAL-AD7381FMCZ>`
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- :adi:`EVAL-AD7386FMCZ <EVAL-AD7386FMCZ>`
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- :adi:`EVAL-AD7383FMCZ <EVAL-AD7383FMCZ>`
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- :adi:`EVAL-AD7380-4FMCZ <EVAL-AD7380-4FMCZ>`
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Supported devices
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-------------------------------------------------------------------------------
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- :adi:`AD7380`
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- :adi:`AD7381`
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- :adi:`AD7383`
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- :adi:`AD7384`
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- :adi:`AD7386`
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- :adi:`AD7387`
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- :adi:`AD7388`
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- :adi:`AD4680`
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- :adi:`AD4681`
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- :adi:`AD4682`
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- :adi:`AD4683`
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- :adi:`AD4684`
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- :adi:`AD4685`
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Supported carriers
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-------------------------------------------------------------------------------
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- :xilinx:`ZedBoard <products/boards-and-kits/1-8dyf-11.html>` on FMC slot
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Block design
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-------------------------------------------------------------------------------
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Block diagram
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The data path and clock domains are depicted in the below diagram:
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.. image:: ad738x_spi_engine_hdl.svg
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:width: 800
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:align: center
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:alt: AD738X_FMC block diagram
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Jumper setup
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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================== ================= ==========================================
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Jumper/Solder link Default Position Description
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================== ================= ==========================================
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LK1 1 Use internal -2.5 V from U9 for AMP_PWR-
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LK2 1 Use internal 5 V from U8 for AMP_PWR+.
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LK3 1 Use 12 V power supply from FMC
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LK4 3 Use internal +3V3 from U3 for VREF
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LK5 3 Use internal 2.3 V from U6 for VLOGIC
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JP1 1 (SMD RES) Connect external SubMiniature Version B
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(SMB) Connector J1 to the A1 buffer
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amplifier
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JP2 1 (SMD RES) Connect internal signal from A2 to ADC U10
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input AINA-
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JP3 1 (SMD RES) Connect internal signal from A2 to ADC U10
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input AINA+
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JP4 3 (SMD RES) The REFIO pin is driven with the external
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on board reference
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JP5 1 (SMD RES) Use internal +3V3 from U2 for VCC.
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JP6 1 (SMD RES) Connect external SMB Connector J2 to the
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A1 buffer amplifier
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================== ================= ==========================================
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CPU/Memory interconnects addresses
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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The addresses are dependent on the architecture of the FPGA, having an offset
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added to the base address from HDL (see more at :ref:`architecture`).
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========================= ===========
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Instance Address
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========================= ===========
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spi_ad738x_adc_axi_regmap 0x44A0_0000
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axi_ad738x_dma 0x44A3_0000
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spi_clkgen 0x44A7_0000
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spi_trigger_gen 0x44B0_0000
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========================= ===========
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I2C connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 20 20 20 20 20
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:header-rows: 1
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* - I2C type
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- I2C manager instance
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- Alias
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- Address
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- I2C subordinate
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* - PL
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- iic_fmc
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- axi_iic_fmc
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- 0x4162_0000
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- ---
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* - PL
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- iic_main
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- axi_iic_main
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- 0x4160_0000
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- ---
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SPI connections
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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.. list-table::
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:widths: 25 25 25 25
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:header-rows: 1
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* - SPI type
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- SPI manager instance
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- SPI subordinate
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- CS
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* - PL
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- axi_spi_engine
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- ad738x
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- 0
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Interrupts
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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Below are the Programmable Logic interrupts used in this project.
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=================== === ========== ===========
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Instance name HDL Linux Zynq Actual Zynq
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=================== === ========== ===========
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axi_ad738x_dma 13 57 89
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spi_ad738x_adc 12 56 88
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=================== === ========== ===========
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Building the HDL project
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-------------------------------------------------------------------------------
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The design is built upon ADI's generic HDL reference design framework.
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ADI does not distribute the bit/elf files of these projects so they
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must be built from the sources available :git-hdl:`here </>`. To get
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the source you must
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`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
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the HDL repository, and then build the project as follows:
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**Linux/Cygwin/WSL**
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.. code-block::
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:linenos:
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user@analog:~$ cd hdl/projects/ad738x_fmc/zed
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user@analog:~/hdl/projects/ad738x_fmc/zed$ make
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A more comprehensive build guide can be found in the :ref:`build_hdl` user guide.
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Resources
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-------------------------------------------------------------------------------
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Hardware related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Product datasheets:
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- :adi:`AD7380`
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- :adi:`AD7381`
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- :adi:`AD7383`
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- :adi:`AD7384`
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- :adi:`AD7386`
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- :adi:`AD7387`
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- :adi:`AD7388`
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- :adi:`AD4680`
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- :adi:`AD4681`
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- :adi:`AD4682`
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- :adi:`AD4683`
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- :adi:`AD4684`
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- :adi:`AD4685`
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- `UG-1304, Evaluation Board User Guide <https://www.analog.com/media/en/technical-documentation/user-guides/eval-ad7380fmcz-7381fmcz-ug-1304.pdf>`__
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HDL related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-hdl:`AD738x_FMC HDL project source code <projects/ad738x_fmc>`
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.. list-table::
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:widths: 30 35 35
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:header-rows: 1
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* - IP name
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- Source code link
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- Documentation link
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* - AXI_CLKGEN
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- :git-hdl:`library/axi_dmac <library/axi_clkgen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_clkgen>`
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* - AXI_DMAC
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- :git-hdl:`library/axi_dmac <library/axi_dmac>`
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- :ref:`here <axi_dmac>`
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* - AXI_HDMI_TX
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- :git-hdl:`library/axi_hdmi_tx <library/axi_hdmi_tx>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_hdmi_tx>`
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* - AXI_I2S_ADI
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- :git-hdl:`library/axi_i2s_adi <library/axi_i2s_adi>`
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- ---
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* - AXI_PWM_GEN
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- :git-hdl:`library/axi_pwm_gen <library/axi_pwm_gen>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_pwm_gen>`
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* - AXI_SPDIF_TX
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- :git-hdl:`library/axi_spdif_tx <library/axi_spdif_tx>`
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- ---
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* - AXI_SYSID
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- :git-hdl:`library/axi_sysid <library/axi_sysid>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - AXI_SPI_ENGINE
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- :git-hdl:`library/spi_engine/axi_spi_engine <library/spi_engine/axi_spi_engine>`
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- :ref:`here <spi_engine axi>`
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* - SPI_ENGINE_EXECUTION
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- :git-hdl:`library/spi_engine/spi_engine_execution <library/spi_engine/spi_engine_execution>`
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- :ref:`here <spi_engine execution>`
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* - SPI_ENGINE_INTERCONNECT
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- :git-hdl:`library/spi_engine/spi_engine_interconnect <library/spi_engine/spi_engine_interconnect>`
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- :ref:`here <spi_engine interconnect>`
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* - SPI_ENGINE_OFFLOAD
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- :git-hdl:`library/spi_engine/spi_engine_offload <library/spi_engine/spi_engine_offload>`
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- :ref:`here <spi_engine offload>`
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* - SYSID_ROM
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- :git-hdl:`library/sysid_rom <library/sysid_rom>`
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- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
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* - UTIL_I2C-MIXER
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- :git-hdl:`library/util_i2c_mixer <library/util_i2c_mixer>`
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- ---
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- :ref:`SPI Engine Framework documentation <spi_engine>`
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Software related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- :git-no-os:`AD738X_FMC No-OS project <projects/ad738x_fmcz>`
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- :dokuwiki:`AD738X_FMC - No-OS Driver [Wiki] <resources/eval/user-guides/ad738x>`
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- :dokuwiki:`How to build No-OS <resources/no-os/build>`
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.. include:: ../common/more_information.rst
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.. include:: ../common/support.rst
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