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pluto_hdl_adi/library/spi_engine/spi_engine_interconnect/Makefile

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Add SPI Engine framework SPI Engine is a highly flexible and powerful SPI controller framework. It consist out of multiple sub-modules which communicate over well defined interfaces. This allows a high degree of flexibility and re-usability while at the same time staying highly customizable and easily extensible. Currently included are four components: * SPI Engine execution module: The excution module is responsible for handling the low-level physical interface SPI logic. * SPI Engine AXI interface module: The AXI interface module allows memory mapped acccess to a SPI bus control stream and can be used to implement a software driver that controls the SPI bus. * SPI Engine offload module: The offload module allows to store a predefined SPI Engine command and data stream which will be send out when a external trigger signal is asserted. * SPI Engine interconnect module: The interconnect module allows to combine multiple control streams into a single stream giving multiple control modules access to a execution module. For more information see: http://wiki.analog.com/resources/fpga/peripherals/spi_engine Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 10:12:11 +00:00
####################################################################################
####################################################################################
## Copyright 2011(c) Analog Devices, Inc.
## Auto-generated, do not modify!
####################################################################################
####################################################################################
M_DEPS += ../../scripts/adi_env.tcl
M_DEPS += ../../scripts/adi_ip.tcl
M_DEPS += spi_engine_interconnect.v
updated makefiles
2016-12-09 21:06:41 +00:00
M_DEPS += spi_engine_interconnect_ip.tcl
M_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl.xml
M_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl_rtl.xml
Add SPI Engine framework SPI Engine is a highly flexible and powerful SPI controller framework. It consist out of multiple sub-modules which communicate over well defined interfaces. This allows a high degree of flexibility and re-usability while at the same time staying highly customizable and easily extensible. Currently included are four components: * SPI Engine execution module: The excution module is responsible for handling the low-level physical interface SPI logic. * SPI Engine AXI interface module: The AXI interface module allows memory mapped acccess to a SPI bus control stream and can be used to implement a software driver that controls the SPI bus. * SPI Engine offload module: The offload module allows to store a predefined SPI Engine command and data stream which will be send out when a external trigger signal is asserted. * SPI Engine interconnect module: The interconnect module allows to combine multiple control streams into a single stream giving multiple control modules access to a execution module. For more information see: http://wiki.analog.com/resources/fpga/peripherals/spi_engine Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 10:12:11 +00:00
M_VIVADO := vivado -mode batch -source
M_FLIST := *.cache
M_FLIST += *.data
M_FLIST += *.xpr
M_FLIST += *.log
M_FLIST += component.xml
M_FLIST += *.jou
M_FLIST += xgui
hdl make updates
2016-06-01 17:53:09 +00:00
M_FLIST += *.ip_user_files
M_FLIST += *.srcs
M_FLIST += *.hw
M_FLIST += *.sim
Add SPI Engine framework SPI Engine is a highly flexible and powerful SPI controller framework. It consist out of multiple sub-modules which communicate over well defined interfaces. This allows a high degree of flexibility and re-usability while at the same time staying highly customizable and easily extensible. Currently included are four components: * SPI Engine execution module: The excution module is responsible for handling the low-level physical interface SPI logic. * SPI Engine AXI interface module: The AXI interface module allows memory mapped acccess to a SPI bus control stream and can be used to implement a software driver that controls the SPI bus. * SPI Engine offload module: The offload module allows to store a predefined SPI Engine command and data stream which will be send out when a external trigger signal is asserted. * SPI Engine interconnect module: The interconnect module allows to combine multiple control streams into a single stream giving multiple control modules access to a execution module. For more information see: http://wiki.analog.com/resources/fpga/peripherals/spi_engine Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 10:12:11 +00:00
M_FLIST += .Xil
.PHONY: all clean clean-all
all: spi_engine_interconnect.xpr
clean:clean-all
clean-all:
rm -rf $(M_FLIST)
spi_engine_interconnect.xpr: $(M_DEPS)
Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools
2016-08-05 12:16:04 +00:00
-rm -rf $(M_FLIST)
Add SPI Engine framework SPI Engine is a highly flexible and powerful SPI controller framework. It consist out of multiple sub-modules which communicate over well defined interfaces. This allows a high degree of flexibility and re-usability while at the same time staying highly customizable and easily extensible. Currently included are four components: * SPI Engine execution module: The excution module is responsible for handling the low-level physical interface SPI logic. * SPI Engine AXI interface module: The AXI interface module allows memory mapped acccess to a SPI bus control stream and can be used to implement a software driver that controls the SPI bus. * SPI Engine offload module: The offload module allows to store a predefined SPI Engine command and data stream which will be send out when a external trigger signal is asserted. * SPI Engine interconnect module: The interconnect module allows to combine multiple control streams into a single stream giving multiple control modules access to a execution module. For more information see: http://wiki.analog.com/resources/fpga/peripherals/spi_engine Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 10:12:11 +00:00
$(M_VIVADO) spi_engine_interconnect_ip.tcl >> spi_engine_interconnect_ip.log 2>&1
####################################################################################
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