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pluto_hdl_adi/projects/fmcomms5/zc702/system_bd.tcl

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moved fmcomms5
2014-05-19 17:49:49 +00:00
source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl
fmcomms5: Moved the clock generation for dma transfer inside system_bd of the platform
2015-04-02 19:29:17 +00:00
set_property -dict [list CONFIG.PCW_EN_CLK2_PORT {1}] $sys_ps7
fmcomms5: Updated zc702 project to the latest framework
2015-03-31 14:44:09 +00:00
set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {150.0}] $sys_ps7
fmcomms5: Moved the clock generation for dma transfer inside system_bd of the platform
2015-04-02 19:29:17 +00:00
ad_connect sys_dma_clk sys_ps7/FCLK_CLK2
source ../common/fmcomms5_bd.tcl
ad9361- delay initialization
2017-03-15 16:06:49 +00:00
set_property CONFIG.ADC_INIT_DELAY 24 [get_bd_cells axi_ad9361_0]
set_property CONFIG.ADC_INIT_DELAY 24 [get_bd_cells axi_ad9361_1]