pluto_hdl_adi/library/common/altera/ad_rst.v

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// ***************************************************************************
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`timescale 1ns/100ps

module ad_rst (

  // clock reset

  preset,
  clk,
  rst);

  // clock reset

  input           preset;
  input           clk;
  output          rst;

  // simple reset gen

  lpm_ff #(.LPM_WIDTH(1), .LPM_AVALUE(1'b1)) i_rst_reg (
    .enable (1'b1),
    .data (1'b0),
    .aset (preset),
    .clock (clk),
    .q (rst));

endmodule

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