pluto_hdl_adi/projects/fmcomms2/vc707/system_constr.xdc

###############################################################################
## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################

# constraints
# ad9361

set_property  -dict {PACKAGE_PIN  K39  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_clk_in_p]        ; ## G6   FMC1_HPC_LA00_CC_P
set_property  -dict {PACKAGE_PIN  K40  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_clk_in_n]        ; ## G7   FMC1_HPC_LA00_CC_N
set_property  -dict {PACKAGE_PIN  J40  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_frame_in_p]      ; ## D8   FMC1_HPC_LA01_CC_P
set_property  -dict {PACKAGE_PIN  J41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_frame_in_n]      ; ## D9   FMC1_HPC_LA01_CC_N
set_property  -dict {PACKAGE_PIN  P41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[0]]    ; ## H7   FMC1_HPC_LA02_P
set_property  -dict {PACKAGE_PIN  N41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[0]]    ; ## H8   FMC1_HPC_LA02_N
set_property  -dict {PACKAGE_PIN  M42  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[1]]    ; ## G9   FMC1_HPC_LA03_P
set_property  -dict {PACKAGE_PIN  L42  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[1]]    ; ## G10  FMC1_HPC_LA03_N
set_property  -dict {PACKAGE_PIN  H40  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[2]]    ; ## H10  FMC1_HPC_LA04_P
set_property  -dict {PACKAGE_PIN  H41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[2]]    ; ## H11  FMC1_HPC_LA04_N
set_property  -dict {PACKAGE_PIN  M41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[3]]    ; ## D11  FMC1_HPC_LA05_P
set_property  -dict {PACKAGE_PIN  L41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[3]]    ; ## D12  FMC1_HPC_LA05_N
set_property  -dict {PACKAGE_PIN  K42  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[4]]    ; ## C10  FMC1_HPC_LA06_P
set_property  -dict {PACKAGE_PIN  J42  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[4]]    ; ## C11  FMC1_HPC_LA06_N
set_property  -dict {PACKAGE_PIN  G41  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[5]]    ; ## H13  FMC1_HPC_LA07_P
set_property  -dict {PACKAGE_PIN  G42  IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[5]]    ; ## H14  FMC1_HPC_LA07_N
set_property  -dict {PACKAGE_PIN  M37  IOSTANDARD LVDS} [get_ports tx_clk_out_p]                      ; ## G12  FMC1_HPC_LA08_P
set_property  -dict {PACKAGE_PIN  M38  IOSTANDARD LVDS} [get_ports tx_clk_out_n]                      ; ## G13  FMC1_HPC_LA08_N
set_property  -dict {PACKAGE_PIN  R42  IOSTANDARD LVDS} [get_ports tx_frame_out_p]                    ; ## D14  FMC1_HPC_LA09_P
set_property  -dict {PACKAGE_PIN  P42  IOSTANDARD LVDS} [get_ports tx_frame_out_n]                    ; ## D15  FMC1_HPC_LA09_N
set_property  -dict {PACKAGE_PIN  F40  IOSTANDARD LVDS} [get_ports tx_data_out_p[0]]                  ; ## H16  FMC1_HPC_LA11_P
set_property  -dict {PACKAGE_PIN  F41  IOSTANDARD LVDS} [get_ports tx_data_out_n[0]]                  ; ## H17  FMC1_HPC_LA11_N
set_property  -dict {PACKAGE_PIN  R40  IOSTANDARD LVDS} [get_ports tx_data_out_p[1]]                  ; ## G15  FMC1_HPC_LA12_P
set_property  -dict {PACKAGE_PIN  P40  IOSTANDARD LVDS} [get_ports tx_data_out_n[1]]                  ; ## G16  FMC1_HPC_LA12_N
set_property  -dict {PACKAGE_PIN  H39  IOSTANDARD LVDS} [get_ports tx_data_out_p[2]]                  ; ## D17  FMC1_HPC_LA13_P
set_property  -dict {PACKAGE_PIN  G39  IOSTANDARD LVDS} [get_ports tx_data_out_n[2]]                  ; ## D18  FMC1_HPC_LA13_N
set_property  -dict {PACKAGE_PIN  N38  IOSTANDARD LVDS} [get_ports tx_data_out_p[3]]                  ; ## C14  FMC1_HPC_LA10_P
set_property  -dict {PACKAGE_PIN  M39  IOSTANDARD LVDS} [get_ports tx_data_out_n[3]]                  ; ## C15  FMC1_HPC_LA10_N
set_property  -dict {PACKAGE_PIN  N39  IOSTANDARD LVDS} [get_ports tx_data_out_p[4]]                  ; ## C18  FMC1_HPC_LA14_P
set_property  -dict {PACKAGE_PIN  N40  IOSTANDARD LVDS} [get_ports tx_data_out_n[4]]                  ; ## C19  FMC1_HPC_LA14_N
set_property  -dict {PACKAGE_PIN  M36  IOSTANDARD LVDS} [get_ports tx_data_out_p[5]]                  ; ## H19  FMC1_HPC_LA15_P
set_property  -dict {PACKAGE_PIN  L37  IOSTANDARD LVDS} [get_ports tx_data_out_n[5]]                  ; ## H20  FMC1_HPC_LA15_N

set_property  -dict {PACKAGE_PIN  Y29  IOSTANDARD LVCMOS18} [get_ports gpio_status[0]]                ; ## G21  FMC1_HPC_LA20_P
set_property  -dict {PACKAGE_PIN  Y30  IOSTANDARD LVCMOS18} [get_ports gpio_status[1]]                ; ## G22  FMC1_HPC_LA20_N
set_property  -dict {PACKAGE_PIN  N28  IOSTANDARD LVCMOS18} [get_ports gpio_status[2]]                ; ## H25  FMC1_HPC_LA21_P
set_property  -dict {PACKAGE_PIN  N29  IOSTANDARD LVCMOS18} [get_ports gpio_status[3]]                ; ## H26  FMC1_HPC_LA21_N
set_property  -dict {PACKAGE_PIN  R28  IOSTANDARD LVCMOS18} [get_ports gpio_status[4]]                ; ## G24  FMC1_HPC_LA22_P
set_property  -dict {PACKAGE_PIN  P28  IOSTANDARD LVCMOS18} [get_ports gpio_status[5]]                ; ## G25  FMC1_HPC_LA22_N
set_property  -dict {PACKAGE_PIN  P30  IOSTANDARD LVCMOS18} [get_ports gpio_status[6]]                ; ## D23  FMC1_HPC_LA23_P
set_property  -dict {PACKAGE_PIN  N31  IOSTANDARD LVCMOS18} [get_ports gpio_status[7]]                ; ## D24  FMC1_HPC_LA23_N
set_property  -dict {PACKAGE_PIN  R30  IOSTANDARD LVCMOS18} [get_ports gpio_ctl[0]]                   ; ## H28  FMC1_HPC_LA24_P
set_property  -dict {PACKAGE_PIN  P31  IOSTANDARD LVCMOS18} [get_ports gpio_ctl[1]]                   ; ## H29  FMC1_HPC_LA24_N
set_property  -dict {PACKAGE_PIN  K29  IOSTANDARD LVCMOS18} [get_ports gpio_ctl[2]]                   ; ## G27  FMC1_HPC_LA25_P
set_property  -dict {PACKAGE_PIN  K30  IOSTANDARD LVCMOS18} [get_ports gpio_ctl[3]]                   ; ## G28  FMC1_HPC_LA25_N
set_property  -dict {PACKAGE_PIN  W30  IOSTANDARD LVCMOS18} [get_ports gpio_en_agc]                   ; ## H22  FMC1_HPC_LA19_P
set_property  -dict {PACKAGE_PIN  W31  IOSTANDARD LVCMOS18} [get_ports gpio_sync]                     ; ## H23  FMC1_HPC_LA19_N
set_property  -dict {PACKAGE_PIN  L29  IOSTANDARD LVCMOS18} [get_ports gpio_resetb]                   ; ## H31  FMC1_HPC_LA28_P

set_property  -dict {PACKAGE_PIN  K37  IOSTANDARD LVCMOS18} [get_ports enable]                        ; ## G18  FMC1_HPC_LA16_P
set_property  -dict {PACKAGE_PIN  K38  IOSTANDARD LVCMOS18} [get_ports txnrx]                         ; ## G19  FMC1_HPC_LA16_N

set_property  -dict {PACKAGE_PIN  J30  IOSTANDARD LVCMOS18  PULLTYPE PULLUP} [get_ports spi_csn_0]    ; ## D26  FMC1_HPC_LA26_P
set_property  -dict {PACKAGE_PIN  H30  IOSTANDARD LVCMOS18} [get_ports spi_clk]                       ; ## D27  FMC1_HPC_LA26_N
set_property  -dict {PACKAGE_PIN  J31  IOSTANDARD LVCMOS18} [get_ports spi_mosi]                      ; ## C26  FMC1_HPC_LA27_P
set_property  -dict {PACKAGE_PIN  H31  IOSTANDARD LVCMOS18} [get_ports spi_miso]                      ; ## C27  FMC1_HPC_LA27_N

# clocks

create_clock -name rx_clk       -period  4 [get_ports rx_clk_in_p]
Add copyright and license to .xdc files Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com> 2023-07-10 08:38:46 +00:00			`###############################################################################`
			`## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.`
			`### SPDX short identifier: ADIBSD`
			`###############################################################################`
FMCOMMS2 VC707 Project 2014-04-01 12:34:29 +00:00
			`# constraints`
fmcomms2_ALL: Preserve backward compatibility for ENABLE/TXNRX control By default the ENABLE/TXNRX pins are controlled by GPIOs, if the TDD module is enabled, the TDD FSM will take over the control of these two pins. 2015-07-01 10:54:01 +00:00			`# ad9361`
FMCOMMS2 VC707 Project 2014-04-01 12:34:29 +00:00
fmcomms2/vc707: Cosmetic changes 2015-09-25 16:04:10 +00:00			`set_property -dict {PACKAGE_PIN K39 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_clk_in_p] ; ## G6 FMC1_HPC_LA00_CC_P`
			`set_property -dict {PACKAGE_PIN K40 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_clk_in_n] ; ## G7 FMC1_HPC_LA00_CC_N`
			`set_property -dict {PACKAGE_PIN J40 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_frame_in_p] ; ## D8 FMC1_HPC_LA01_CC_P`
			`set_property -dict {PACKAGE_PIN J41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_frame_in_n] ; ## D9 FMC1_HPC_LA01_CC_N`
			`set_property -dict {PACKAGE_PIN P41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[0]] ; ## H7 FMC1_HPC_LA02_P`
			`set_property -dict {PACKAGE_PIN N41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[0]] ; ## H8 FMC1_HPC_LA02_N`
			`set_property -dict {PACKAGE_PIN M42 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[1]] ; ## G9 FMC1_HPC_LA03_P`
			`set_property -dict {PACKAGE_PIN L42 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[1]] ; ## G10 FMC1_HPC_LA03_N`
			`set_property -dict {PACKAGE_PIN H40 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[2]] ; ## H10 FMC1_HPC_LA04_P`
			`set_property -dict {PACKAGE_PIN H41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[2]] ; ## H11 FMC1_HPC_LA04_N`
			`set_property -dict {PACKAGE_PIN M41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[3]] ; ## D11 FMC1_HPC_LA05_P`
			`set_property -dict {PACKAGE_PIN L41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[3]] ; ## D12 FMC1_HPC_LA05_N`
			`set_property -dict {PACKAGE_PIN K42 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[4]] ; ## C10 FMC1_HPC_LA06_P`
			`set_property -dict {PACKAGE_PIN J42 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[4]] ; ## C11 FMC1_HPC_LA06_N`
			`set_property -dict {PACKAGE_PIN G41 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_p[5]] ; ## H13 FMC1_HPC_LA07_P`
			`set_property -dict {PACKAGE_PIN G42 IOSTANDARD LVDS DIFF_TERM TRUE} [get_ports rx_data_in_n[5]] ; ## H14 FMC1_HPC_LA07_N`
			`set_property -dict {PACKAGE_PIN M37 IOSTANDARD LVDS} [get_ports tx_clk_out_p] ; ## G12 FMC1_HPC_LA08_P`
			`set_property -dict {PACKAGE_PIN M38 IOSTANDARD LVDS} [get_ports tx_clk_out_n] ; ## G13 FMC1_HPC_LA08_N`
			`set_property -dict {PACKAGE_PIN R42 IOSTANDARD LVDS} [get_ports tx_frame_out_p] ; ## D14 FMC1_HPC_LA09_P`
			`set_property -dict {PACKAGE_PIN P42 IOSTANDARD LVDS} [get_ports tx_frame_out_n] ; ## D15 FMC1_HPC_LA09_N`
			`set_property -dict {PACKAGE_PIN F40 IOSTANDARD LVDS} [get_ports tx_data_out_p[0]] ; ## H16 FMC1_HPC_LA11_P`
			`set_property -dict {PACKAGE_PIN F41 IOSTANDARD LVDS} [get_ports tx_data_out_n[0]] ; ## H17 FMC1_HPC_LA11_N`
			`set_property -dict {PACKAGE_PIN R40 IOSTANDARD LVDS} [get_ports tx_data_out_p[1]] ; ## G15 FMC1_HPC_LA12_P`
			`set_property -dict {PACKAGE_PIN P40 IOSTANDARD LVDS} [get_ports tx_data_out_n[1]] ; ## G16 FMC1_HPC_LA12_N`
			`set_property -dict {PACKAGE_PIN H39 IOSTANDARD LVDS} [get_ports tx_data_out_p[2]] ; ## D17 FMC1_HPC_LA13_P`
			`set_property -dict {PACKAGE_PIN G39 IOSTANDARD LVDS} [get_ports tx_data_out_n[2]] ; ## D18 FMC1_HPC_LA13_N`
			`set_property -dict {PACKAGE_PIN N38 IOSTANDARD LVDS} [get_ports tx_data_out_p[3]] ; ## C14 FMC1_HPC_LA10_P`
			`set_property -dict {PACKAGE_PIN M39 IOSTANDARD LVDS} [get_ports tx_data_out_n[3]] ; ## C15 FMC1_HPC_LA10_N`
			`set_property -dict {PACKAGE_PIN N39 IOSTANDARD LVDS} [get_ports tx_data_out_p[4]] ; ## C18 FMC1_HPC_LA14_P`
			`set_property -dict {PACKAGE_PIN N40 IOSTANDARD LVDS} [get_ports tx_data_out_n[4]] ; ## C19 FMC1_HPC_LA14_N`
			`set_property -dict {PACKAGE_PIN M36 IOSTANDARD LVDS} [get_ports tx_data_out_p[5]] ; ## H19 FMC1_HPC_LA15_P`
			`set_property -dict {PACKAGE_PIN L37 IOSTANDARD LVDS} [get_ports tx_data_out_n[5]] ; ## H20 FMC1_HPC_LA15_N`
FMCOMMS2 VC707 Project 2014-04-01 12:34:29 +00:00
fmcomms2/vc707: Cosmetic changes 2015-09-25 16:04:10 +00:00			`set_property -dict {PACKAGE_PIN Y29 IOSTANDARD LVCMOS18} [get_ports gpio_status[0]] ; ## G21 FMC1_HPC_LA20_P`
			`set_property -dict {PACKAGE_PIN Y30 IOSTANDARD LVCMOS18} [get_ports gpio_status[1]] ; ## G22 FMC1_HPC_LA20_N`
			`set_property -dict {PACKAGE_PIN N28 IOSTANDARD LVCMOS18} [get_ports gpio_status[2]] ; ## H25 FMC1_HPC_LA21_P`
			`set_property -dict {PACKAGE_PIN N29 IOSTANDARD LVCMOS18} [get_ports gpio_status[3]] ; ## H26 FMC1_HPC_LA21_N`
			`set_property -dict {PACKAGE_PIN R28 IOSTANDARD LVCMOS18} [get_ports gpio_status[4]] ; ## G24 FMC1_HPC_LA22_P`
			`set_property -dict {PACKAGE_PIN P28 IOSTANDARD LVCMOS18} [get_ports gpio_status[5]] ; ## G25 FMC1_HPC_LA22_N`
			`set_property -dict {PACKAGE_PIN P30 IOSTANDARD LVCMOS18} [get_ports gpio_status[6]] ; ## D23 FMC1_HPC_LA23_P`
			`set_property -dict {PACKAGE_PIN N31 IOSTANDARD LVCMOS18} [get_ports gpio_status[7]] ; ## D24 FMC1_HPC_LA23_N`
			`set_property -dict {PACKAGE_PIN R30 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[0]] ; ## H28 FMC1_HPC_LA24_P`
			`set_property -dict {PACKAGE_PIN P31 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[1]] ; ## H29 FMC1_HPC_LA24_N`
			`set_property -dict {PACKAGE_PIN K29 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[2]] ; ## G27 FMC1_HPC_LA25_P`
			`set_property -dict {PACKAGE_PIN K30 IOSTANDARD LVCMOS18} [get_ports gpio_ctl[3]] ; ## G28 FMC1_HPC_LA25_N`
			`set_property -dict {PACKAGE_PIN W30 IOSTANDARD LVCMOS18} [get_ports gpio_en_agc] ; ## H22 FMC1_HPC_LA19_P`
			`set_property -dict {PACKAGE_PIN W31 IOSTANDARD LVCMOS18} [get_ports gpio_sync] ; ## H23 FMC1_HPC_LA19_N`
			`set_property -dict {PACKAGE_PIN L29 IOSTANDARD LVCMOS18} [get_ports gpio_resetb] ; ## H31 FMC1_HPC_LA28_P`
FMCOMMS2 VC707 Project 2014-04-01 12:34:29 +00:00
fmcomms2/vc707: Cosmetic changes 2015-09-25 16:04:10 +00:00			`set_property -dict {PACKAGE_PIN K37 IOSTANDARD LVCMOS18} [get_ports enable] ; ## G18 FMC1_HPC_LA16_P`
			`set_property -dict {PACKAGE_PIN K38 IOSTANDARD LVCMOS18} [get_ports txnrx] ; ## G19 FMC1_HPC_LA16_N`

			`set_property -dict {PACKAGE_PIN J30 IOSTANDARD LVCMOS18 PULLTYPE PULLUP} [get_ports spi_csn_0] ; ## D26 FMC1_HPC_LA26_P`
			`set_property -dict {PACKAGE_PIN H30 IOSTANDARD LVCMOS18} [get_ports spi_clk] ; ## D27 FMC1_HPC_LA26_N`
			`set_property -dict {PACKAGE_PIN J31 IOSTANDARD LVCMOS18} [get_ports spi_mosi] ; ## C26 FMC1_HPC_LA27_P`
			`set_property -dict {PACKAGE_PIN H31 IOSTANDARD LVCMOS18} [get_ports spi_miso] ; ## C27 FMC1_HPC_LA27_N`
FMCOMMS2 VC707 Project 2014-04-01 12:34:29 +00:00
			`# clocks`

fmcomms2: Updated vc707 project - updated constraints - updated interrupts - used ad_iobuf - added linear_flash 2014-11-26 09:25:19 +00:00			`create_clock -name rx_clk -period 4 [get_ports rx_clk_in_p]`
fmcomms2: Delete unnecessary clock definition The two clocks, rx_clk and ad9361_clk, are the same. 2015-11-20 17:33:18 +00:00