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pluto_hdl_adi/library/interfaces/fifo_rd_rtl.xml

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Add interface definitions for the fifo_rd and fifo_wr interfaces Using interface definitions makes it possible to group pins of a peripheral into a interface pins. This allows us to use connect_bd_intf_net to connect all pins of the interface instead of having to manually call connect_bd_net for each for the pins. Using interface pins also unclutters the connections in the Vivado block design view a bit. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 14:48:10 +00:00
<?xml version="1.0" encoding="UTF-8"?>
<spirit:abstractionDefinition xmlns:xilinx="http://www.xilinx.com" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
<spirit:vendor>analog.com</spirit:vendor>
<spirit:library>interface</spirit:library>
<spirit:name>fifo_rd_rtl</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busType spirit:vendor="analog.com" spirit:library="interface" spirit:name="fifo_rd" spirit:version="1.0"/>
<spirit:ports>
<spirit:port>
<spirit:logicalName>DATA</spirit:logicalName>
<spirit:description>FIFO Read Data</spirit:description>
<spirit:wire>
<spirit:qualifier>
<spirit:isData>true</spirit:isData>
</spirit:qualifier>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:direction>out</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>EN</spirit:logicalName>
<spirit:description>FIFO Read Enable</spirit:description>
<spirit:wire>
<spirit:onMaster>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>out</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:presence>required</spirit:presence>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onSlave>
<spirit:defaultValue>0</spirit:defaultValue>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>UNDERFLOW</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
<spirit:onSlave>
<spirit:width>1</spirit:width>
</spirit:onSlave>
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>VALID</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
interfaces: Add XFER_REQ to fifo_rd_rtl.xml
2021-03-15 08:44:14 +00:00
</spirit:wire>
</spirit:port>
<spirit:port>
<spirit:logicalName>XFER_REQ</spirit:logicalName>
<spirit:wire>
<spirit:onMaster>
<spirit:width>1</spirit:width>
<spirit:direction>in</spirit:direction>
</spirit:onMaster>
Add interface definitions for the fifo_rd and fifo_wr interfaces Using interface definitions makes it possible to group pins of a peripheral into a interface pins. This allows us to use connect_bd_intf_net to connect all pins of the interface instead of having to manually call connect_bd_net for each for the pins. Using interface pins also unclutters the connections in the Vivado block design view a bit. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-01 14:48:10 +00:00
</spirit:wire>
</spirit:port>
</spirit:ports>
</spirit:abstractionDefinition>