40 lines
1.2 KiB
Tcl
40 lines
1.2 KiB
Tcl
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package require qsys
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source ../scripts/adi_env.tcl
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source ../scripts/adi_ip_intel.tcl
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set_module_property NAME axi_sysid
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set_module_property DESCRIPTION "AXI System ID"
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set_module_property VERSION 1.0
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set_module_property GROUP "Analog Devices"
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set_module_property DISPLAY_NAME axi_sysid
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# source files
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ad_ip_files axi_sysid [list \
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"$ad_hdl_dir/library/common/up_axi.v" \
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"axi_sysid.v"]
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# IP parameters
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add_parameter ROM_WIDTH INTEGER 32
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set_parameter_property ROM_WIDTH DEFAULT_VALUE 32
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set_parameter_property ROM_WIDTH DISPLAY_NAME "ROM width"
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set_parameter_property ROM_WIDTH UNITS None
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set_parameter_property ROM_WIDTH HDL_PARAMETER true
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add_parameter ROM_ADDR_BITS INTEGER 9
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set_parameter_property ROM_ADDR_BITS DEFAULT_VALUE 9
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set_parameter_property ROM_ADDR_BITS DISPLAY_NAME "ROM address bits"
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set_parameter_property ROM_ADDR_BITS HDL_PARAMETER true
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# AXI4 Memory Mapped Interface
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ad_ip_intf_s_axi s_axi_aclk s_axi_aresetn 15
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# external clock and control/status ports
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ad_interface signal sys_rom_data input ROM_WIDTH rom_data
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ad_interface signal pr_rom_data input ROM_WIDTH rom_data
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ad_interface signal rom_addr output ROM_ADDR_BITS
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