2014-04-01 15:46:37 +00:00
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2014-04-02 01:11:32 +00:00
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load_package flow
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2014-04-01 15:46:37 +00:00
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source ../../scripts/adi_env.tcl
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2014-04-01 16:01:57 +00:00
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project_new fmcjesdadc1_a5gt -overwrite
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2014-04-01 15:46:37 +00:00
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2015-11-24 13:39:21 +00:00
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source "../../common/a5gt/a5gt_system_assign.tcl"
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2014-08-25 14:46:59 +00:00
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2014-04-01 15:46:37 +00:00
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set_global_assignment -name VERILOG_FILE ../common/fmcjesdadc1_spi.v
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2016-12-19 13:37:29 +00:00
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set_global_assignment -name VERILOG_FILE ../../../library/common/ad_sysref_gen.v
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2015-07-23 19:23:10 +00:00
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set_global_assignment -name VERILOG_FILE system_top.v
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2016-11-10 16:36:41 +00:00
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set_global_assignment -name QSYS_FILE system_bd.qsys
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2015-07-23 19:23:10 +00:00
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set_global_assignment -name SDC_FILE system_constr.sdc
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set_global_assignment -name TOP_LEVEL_ENTITY system_top
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2014-04-01 15:46:37 +00:00
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# reference clock
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set_location_assignment PIN_AB9 -to ref_clk
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set_location_assignment PIN_AB8 -to "ref_clk(n)"
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to ref_clk
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set_instance_assignment -name XCVR_REFCLK_PIN_TERMINATION AC_COUPLING -to ref_clk
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set_instance_assignment -name XCVR_IO_PIN_TERMINATION 100_OHMS -to ref_clk
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# lane data
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set_location_assignment PIN_AE1 -to rx_data[0]
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set_location_assignment PIN_AE2 -to "rx_data[0](n)"
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set_location_assignment PIN_AA1 -to rx_data[1]
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set_location_assignment PIN_AA2 -to "rx_data[1](n)"
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set_location_assignment PIN_U1 -to rx_data[2]
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set_location_assignment PIN_U2 -to "rx_data[2](n)"
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set_location_assignment PIN_R1 -to rx_data[3]
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set_location_assignment PIN_R2 -to "rx_data[3](n)"
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rx_data[0]
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rx_data[1]
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rx_data[2]
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set_instance_assignment -name IO_STANDARD "1.5-V PCML" -to rx_data[3]
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set_instance_assignment -name XCVR_IO_PIN_TERMINATION 100_OHMS -to rx_data[0]
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set_instance_assignment -name XCVR_IO_PIN_TERMINATION 100_OHMS -to rx_data[1]
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set_instance_assignment -name XCVR_IO_PIN_TERMINATION 100_OHMS -to rx_data[2]
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set_instance_assignment -name XCVR_IO_PIN_TERMINATION 100_OHMS -to rx_data[3]
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# jesd signals
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set_location_assignment PIN_AD25 -to rx_sync
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set_instance_assignment -name IO_STANDARD "2.5 V" -to rx_sync
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set_location_assignment PIN_AC24 -to rx_sysref
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set_instance_assignment -name IO_STANDARD "2.5 V" -to rx_sysref
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# spi
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set_location_assignment PIN_AG27 -to spi_csn
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set_location_assignment PIN_AH27 -to spi_clk
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set_location_assignment PIN_AD24 -to spi_sdio
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set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_csn
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set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_clk
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set_instance_assignment -name IO_STANDARD "2.5 V" -to spi_sdio
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2015-06-24 09:30:03 +00:00
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# disable auto-pack
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2016-12-22 19:13:14 +00:00
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set_global_assignment -name OPTIMIZATION_MODE "AGGRESSIVE PERFORMANCE"
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set_global_assignment -name AUTO_SHIFT_REGISTER_RECOGNITION OFF
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set_global_assignment -name QII_AUTO_PACKED_REGISTERS OFF
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2015-06-24 09:30:03 +00:00
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2014-04-02 01:11:32 +00:00
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execute_flow -compile
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2014-04-01 15:46:37 +00:00
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