2016-08-19 19:56:48 +00:00
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# create board design
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# default ports
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr
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create_bd_intf_port -mode Master -vlnv xilinx.com:display_processing_system7:fixedio_rtl:1.0 fixed_io
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create_bd_port -dir O spi0_csn_2_o
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create_bd_port -dir O spi0_csn_1_o
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create_bd_port -dir O spi0_csn_0_o
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create_bd_port -dir I spi0_csn_i
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create_bd_port -dir I spi0_clk_i
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create_bd_port -dir O spi0_clk_o
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create_bd_port -dir I spi0_sdo_i
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create_bd_port -dir O spi0_sdo_o
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create_bd_port -dir I spi0_sdi_i
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create_bd_port -dir I -from 16 -to 0 gpio_i
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create_bd_port -dir O -from 16 -to 0 gpio_o
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create_bd_port -dir O -from 16 -to 0 gpio_t
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# instance: sys_ps7
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2017-04-14 13:55:07 +00:00
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ad_ip_instance processing_system7 sys_ps7
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2016-08-19 19:56:48 +00:00
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# ps7 settings
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2017-04-14 13:55:07 +00:00
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ad_ip_parameter sys_ps7 CONFIG.PCW_PRESET_BANK0_VOLTAGE {LVCMOS 1.8V}
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ad_ip_parameter sys_ps7 CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 1.8V}
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ad_ip_parameter sys_ps7 CONFIG.PCW_PACKAGE_NAME clg225
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP1 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP2 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_CLK1_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_RST1_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ 100.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA1_PERIPHERAL_FREQMHZ 200.0
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_EMIO_GPIO_IO 17
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI1_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_I2C0_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_UART1_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_UART1_UART1_IO {MIO 12 .. 13}
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ad_ip_parameter sys_ps7 CONFIG.PCW_I2C1_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_QSPI_GRP_SINGLE_SS_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SD0_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_SPI0_SPI0_IO EMIO
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ad_ip_parameter sys_ps7 CONFIG.PCW_TTC0_PERIPHERAL_ENABLE 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_FABRIC_INTERRUPT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_PERIPHERAL_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_MIO_GPIO_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_GPIO_MIO_GPIO_IO MIO
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ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_IO {MIO 52}
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ad_ip_parameter sys_ps7 CONFIG.PCW_USB0_RESET_ENABLE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_INTR 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_IRQ_F2P_MODE REVERSE
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2016-08-19 19:56:48 +00:00
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# DDR MT41K256M16 HA-125 (32M, 16bit, 8banks)
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2017-04-14 13:55:07 +00:00
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_PARTNO {MT41K256M16 RE-125}
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH {16 Bit}
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF 0
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 0.048
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 0.050
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 0.241
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ad_ip_parameter sys_ps7 CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 0.240
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2016-08-19 19:56:48 +00:00
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2017-04-14 13:55:07 +00:00
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ad_ip_instance xlconcat sys_concat_intc
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ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
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2016-08-19 19:56:48 +00:00
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2017-04-14 13:55:07 +00:00
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ad_ip_instance proc_sys_reset sys_rstgen
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ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
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2016-08-19 19:56:48 +00:00
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# system reset/clock definitions
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ad_connect sys_cpu_clk sys_ps7/FCLK_CLK0
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ad_connect sys_200m_clk sys_ps7/FCLK_CLK1
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ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
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ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
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ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
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ad_connect sys_rstgen/ext_reset_in sys_ps7/FCLK_RESET0_N
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# interface connections
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ad_connect ddr sys_ps7/DDR
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ad_connect gpio_i sys_ps7/GPIO_I
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ad_connect gpio_o sys_ps7/GPIO_O
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ad_connect gpio_t sys_ps7/GPIO_T
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ad_connect fixed_io sys_ps7/FIXED_IO
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# spi connections
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ad_connect spi0_csn_2_o sys_ps7/SPI0_SS2_O
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ad_connect spi0_csn_1_o sys_ps7/SPI0_SS1_O
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ad_connect spi0_csn_0_o sys_ps7/SPI0_SS_O
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ad_connect spi0_csn_i sys_ps7/SPI0_SS_I
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ad_connect spi0_clk_i sys_ps7/SPI0_SCLK_I
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ad_connect spi0_clk_o sys_ps7/SPI0_SCLK_O
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ad_connect spi0_sdo_i sys_ps7/SPI0_MOSI_I
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ad_connect spi0_sdo_o sys_ps7/SPI0_MOSI_O
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ad_connect spi0_sdi_i sys_ps7/SPI0_MISO_I
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# interrupts
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ad_connect sys_concat_intc/dout sys_ps7/IRQ_F2P
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2019-10-17 06:56:29 +00:00
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ad_connect sys_concat_intc/In15 GND
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ad_connect sys_concat_intc/In14 GND
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ad_connect sys_concat_intc/In13 GND
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ad_connect sys_concat_intc/In12 GND
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ad_connect sys_concat_intc/In11 GND
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ad_connect sys_concat_intc/In10 GND
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ad_connect sys_concat_intc/In9 GND
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ad_connect sys_concat_intc/In8 GND
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ad_connect sys_concat_intc/In7 GND
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ad_connect sys_concat_intc/In6 GND
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ad_connect sys_concat_intc/In5 GND
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ad_connect sys_concat_intc/In4 GND
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ad_connect sys_concat_intc/In3 GND
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ad_connect sys_concat_intc/In2 GND
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ad_connect sys_concat_intc/In1 GND
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ad_connect sys_concat_intc/In0 GND
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2016-08-19 19:56:48 +00:00
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# iic
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_main
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2017-04-14 13:55:07 +00:00
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ad_ip_instance axi_iic axi_iic_main
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2016-08-19 19:56:48 +00:00
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ad_connect iic_main axi_iic_main/iic
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ad_cpu_interconnect 0x41600000 axi_iic_main
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ad_cpu_interrupt ps-15 mb-15 axi_iic_main/iic2intc_irpt
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# ad9361
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create_bd_port -dir I rx_clk_in
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create_bd_port -dir I rx_frame_in
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create_bd_port -dir I -from 11 -to 0 rx_data_in
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create_bd_port -dir O tx_clk_out
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create_bd_port -dir O tx_frame_out
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create_bd_port -dir O -from 11 -to 0 tx_data_out
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create_bd_port -dir O enable
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create_bd_port -dir O txnrx
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create_bd_port -dir I up_enable
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create_bd_port -dir I up_txnrx
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# ad9361 core(s)
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2017-04-14 13:55:07 +00:00
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ad_ip_instance axi_ad9361 axi_ad9361
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ad_ip_parameter axi_ad9361 CONFIG.ID 0
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ad_ip_parameter axi_ad9361 CONFIG.CMOS_OR_LVDS_N 1
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ad_ip_parameter axi_ad9361 CONFIG.MODE_1R1T 1
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ad_ip_parameter axi_ad9361 CONFIG.ADC_INIT_DELAY 21
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ad_ip_instance axi_dmac axi_ad9361_dac_dma
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.DMA_TYPE_SRC 0
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.DMA_TYPE_DEST 2
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.CYCLIC 1
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.AXI_SLICE_SRC 0
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.AXI_SLICE_DEST 0
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.DMA_2D_TRANSFER 0
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.DMA_DATA_WIDTH_DEST 32
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ad_ip_instance util_fir_int fir_interpolator
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ad_ip_instance xlslice interp_slice
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ad_ip_instance axi_dmac axi_ad9361_adc_dma
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.DMA_TYPE_SRC 2
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.DMA_TYPE_DEST 0
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.CYCLIC 0
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.SYNC_TRANSFER_START 0
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.AXI_SLICE_SRC 0
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.AXI_SLICE_DEST 0
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.DMA_2D_TRANSFER 0
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.DMA_DATA_WIDTH_SRC 32
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ad_ip_instance util_fir_dec fir_decimator
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ad_ip_instance xlslice decim_slice
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2016-08-19 19:56:48 +00:00
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# connections
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ad_connect rx_clk_in axi_ad9361/rx_clk_in
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ad_connect rx_frame_in axi_ad9361/rx_frame_in
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ad_connect rx_data_in axi_ad9361/rx_data_in
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ad_connect tx_clk_out axi_ad9361/tx_clk_out
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ad_connect tx_frame_out axi_ad9361/tx_frame_out
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ad_connect tx_data_out axi_ad9361/tx_data_out
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ad_connect enable axi_ad9361/enable
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ad_connect txnrx axi_ad9361/txnrx
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ad_connect up_enable axi_ad9361/up_enable
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ad_connect up_txnrx axi_ad9361/up_txnrx
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ad_connect axi_ad9361/tdd_sync GND
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ad_connect sys_200m_clk axi_ad9361/delay_clk
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ad_connect axi_ad9361/l_clk axi_ad9361/clk
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2016-10-27 16:33:28 +00:00
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ad_connect axi_ad9361/l_clk fir_decimator/aclk
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ad_connect axi_ad9361/adc_data_i0 fir_decimator/channel_0
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ad_connect axi_ad9361/adc_data_q0 fir_decimator/channel_1
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ad_connect axi_ad9361/adc_valid_i0 fir_decimator/s_axis_data_tvalid
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ad_connect axi_ad9361_adc_dma/fifo_wr_din fir_decimator/m_axis_data_tdata
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ad_connect axi_ad9361_adc_dma/fifo_wr_en fir_decimator/m_axis_data_tvalid
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ad_connect axi_ad9361/up_adc_gpio_out decim_slice/Din
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ad_connect fir_decimator/decimate decim_slice/Dout
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ad_connect axi_ad9361/l_clk fir_interpolator/aclk
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ad_connect axi_ad9361_dac_dma/fifo_rd_dout fir_interpolator/s_axis_data_tdata
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2017-02-13 16:08:52 +00:00
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ad_connect axi_ad9361_dac_dma/fifo_rd_valid fir_interpolator/s_axis_data_tvalid
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2016-10-27 16:33:28 +00:00
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ad_connect axi_ad9361/dac_valid_i0 fir_interpolator/dac_read
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ad_connect axi_ad9361_dac_dma/fifo_rd_en fir_interpolator/s_axis_data_tready
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ad_connect axi_ad9361/dac_data_i0 fir_interpolator/channel_0
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ad_connect axi_ad9361/dac_data_q0 fir_interpolator/channel_1
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ad_connect axi_ad9361/up_dac_gpio_out interp_slice/Din
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ad_connect fir_interpolator/interpolate interp_slice/Dout
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2016-08-19 19:56:48 +00:00
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ad_connect axi_ad9361/l_clk axi_ad9361_adc_dma/fifo_wr_clk
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ad_connect axi_ad9361_adc_dma/fifo_wr_overflow axi_ad9361/adc_dovf
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ad_connect axi_ad9361/l_clk axi_ad9361_dac_dma/fifo_rd_clk
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ad_connect axi_ad9361_dac_dma/fifo_rd_underflow axi_ad9361/dac_dunf
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ad_connect axi_ad9361/dac_data_i1 GND
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ad_connect axi_ad9361/dac_data_q1 GND
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# interconnects
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ad_cpu_interconnect 0x79020000 axi_ad9361
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ad_cpu_interconnect 0x7C400000 axi_ad9361_adc_dma
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ad_cpu_interconnect 0x7C420000 axi_ad9361_dac_dma
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2019-04-11 13:39:04 +00:00
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP1 {1}
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ad_connect sys_cpu_clk sys_ps7/S_AXI_HP1_ACLK
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ad_connect axi_ad9361_adc_dma/m_dest_axi sys_ps7/S_AXI_HP1
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2019-05-17 14:15:38 +00:00
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create_bd_addr_seg -range 0x20000000 -offset 0x00000000 \
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[get_bd_addr_spaces axi_ad9361_adc_dma/m_dest_axi] \
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[get_bd_addr_segs sys_ps7/S_AXI_HP1/HP1_DDR_LOWOCM] \
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SEG_sys_ps7_HP1_DDR_LOWOCM
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2019-04-11 13:39:04 +00:00
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ad_ip_parameter sys_ps7 CONFIG.PCW_USE_S_AXI_HP2 {1}
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ad_connect sys_cpu_clk sys_ps7/S_AXI_HP2_ACLK
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ad_connect axi_ad9361_dac_dma/m_src_axi sys_ps7/S_AXI_HP2
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2019-05-17 14:15:38 +00:00
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create_bd_addr_seg -range 0x20000000 -offset 0x00000000 \
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[get_bd_addr_spaces axi_ad9361_dac_dma/m_src_axi] \
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[get_bd_addr_segs sys_ps7/S_AXI_HP2/HP2_DDR_LOWOCM] \
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SEG_sys_ps7_HP2_DDR_LOWOCM
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2019-04-11 13:39:04 +00:00
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ad_connect sys_cpu_clk axi_ad9361_dac_dma/m_src_axi_aclk
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ad_connect sys_cpu_clk axi_ad9361_adc_dma/m_dest_axi_aclk
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ad_connect sys_cpu_resetn axi_ad9361_adc_dma/m_dest_axi_aresetn
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ad_connect sys_cpu_resetn axi_ad9361_dac_dma/m_src_axi_aresetn
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2016-08-19 19:56:48 +00:00
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# interrupts
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ad_cpu_interrupt ps-13 mb-13 axi_ad9361_adc_dma/irq
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ad_cpu_interrupt ps-12 mb-12 axi_ad9361_dac_dma/irq
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2016-08-19 17:45:40 +00:00
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