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pluto_hdl_adi/projects/adrv9371x/a10soc/system_qsys.tcl

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Add copyright and license to .tcl, .ttcl files Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-06 12:08:22 +00:00
###############################################################################
## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier
2016-09-08 08:44:45 +00:00
adrv9371x/a10soc- dacfifo added
2017-03-01 20:34:04 +00:00
set dac_fifo_address_width 10
adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier
2016-09-08 08:44:45 +00:00
sysid: Upgrade framework, header/ip are now at 2/1.1.a Unify tcl scripts; rename adi_pd_intel.tcl to adi_pd.tcl add git branch to internal use area; update log prints; update xilixn projects; fix cn0506 sysid script;
2020-10-09 14:28:10 +00:00
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier
2016-09-08 08:44:45 +00:00
source $ad_hdl_dir/projects/common/a10soc/a10soc_system_qsys.tcl
adrv9371x/a10soc- dacfifo added
2017-03-01 20:34:04 +00:00
source $ad_hdl_dir/projects/common/a10soc/a10soc_plddr4_dacfifo_qsys.tcl
Updated the makefiles to build the projects in subdirectories based on the build parameters. Running 'make' will build the default project directly in the project folder (like it did before) Running 'make RX_LANE_RATE=15 TX_LANE_RATE=15' will build the project inside the 'RXRATE15_TXRATE15' subdirectory. Running 'make CFG=cfg/test_config.txt" will use the variables found inside the configuration file and build the project inside the 'test_config' subdirectory. Running 'make clean' will clean the default project only. Running 'make CFG=cfg/test_config.txt clean' will clean the 'testconfig' build. Running 'make clean-all' will delete all the built configurations and libraries. Note that the 'JESD' and 'LANE' words from the parameter names are stripped. Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
2022-09-23 09:28:22 +00:00
if [info exists ad_project_dir] {
source ../../common/adrv9371x_qsys.tcl
} else {
source ../common/adrv9371x_qsys.tcl
}
adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier
2016-09-08 08:44:45 +00:00
sysid_intel: Added sysid to intel projects
2020-08-18 20:52:39 +00:00
#system ID
set_instance_parameter_value axi_sysid_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {ROM_ADDR_BITS} {9}
set_instance_parameter_value rom_sys_0 {PATH_TO_FILE} "[pwd]/mem_init_sys.txt"
sysid: Remove cstring init string
2020-09-28 21:10:35 +00:00
sysid_gen_sys_init_file;
adrv9371x: Updated a10soc project. Common design differentiates between nios and a10soc carrier
2016-09-08 08:44:45 +00:00