fmcomms1: Updated ZC706 project to be compatible with util_wfifo and increased system_constr.xdc priority

projects/fmcomms1/zc706/system_constr.xdc

@@ -85,6 +85,6 @@ set_property  -dict {PACKAGE_PIN AG15   IOSTANDARD LVDS_25 DIFF_TERM TRUE} [get_
 create_clock -name dac_clk_in   -period  2.00 [get_ports dac_clk_in_p]
 create_clock -name adc_clk_in   -period  4.00 [get_ports adc_clk_in_p]
 create_clock -name dac_div_clk  -period  8.00 [get_pins i_system_wrapper/system_i/axi_ad9122/dac_div_clk]
-create_clock -name adc_clk      -period  4.00 [get_pins i_system_wrapper/system_i/axi_ad9643/adc_clk]
-set_false_path -from i_system_wrapper/system_i/axi_ad9643_dma/inst/i_request_arb/i_src_dma_fifo/overflow_reg/C \
-               -to i_system_wrapper/system_i/sys_wfifo/wfifo_ctl/inst/m_wovf_m2_reg_srl2/D
+
+set_false_path -from [get_pins i_system_wrapper/system_i/axi_ad9643_dma/inst/i_request_arb/i_src_dma_fifo/overflow_reg/C] \
+               -to [get_pins i_system_wrapper/system_i/sys_wfifo/wfifo_ctl/inst/m_wovf_m1_reg/D]

projects/fmcomms1/zc706/system_project.tcl

@@ -9,6 +9,9 @@ adi_project_files fmcomms1_zc706 [list \
   "$ad_hdl_dir/library/common/ad_iobuf.v" \
   "$ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc" ]
 
+set_property PROCESSING_ORDER EARLY [get_files $ad_hdl_dir/projects/common/zc706/zc706_system_constr.xdc]
+set_property PROCESSING_ORDER EARLY [get_files system_constr.xdc]
+
 adi_project_run fmcomms1_zc706
 
 

projects/fmcomms1/zc706/system_top.v

@@ -182,7 +182,6 @@ module system_top (
   wire            oddr_ref_clk;
   wire    [15:0]  ps_intrs;
 
-
   // instantiations
 
   ODDR #(
@@ -203,7 +202,7 @@ module system_top (
     .O (ref_clk_out_p),
     .OB (ref_clk_out_n));
 
-  ad_iobuf #(
+ ad_iobuf #(
     .DATA_WIDTH(15))
   i_gpio_bd (
     .dt(gpio_t),