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axi_ad9467: Fix PN sequence checker 

Make sure that the reference PN sequence is only incremented every two clock
cycles to make sure that it matches the rate of the ADC PN sequence.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2014-10-06 16:15:25 +02:00
parent b029d07adf
commit 0539bc36c8
1 changed files with 6 additions and 4 deletions
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10
library/axi_ad9467/axi_ad9467_pnmon.v
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@ -165,10 +165,12 @@ module axi_ad9467_pnmon (
always @(posedge adc_clk) begin
adc_valid_in <= ~adc_valid_in;
adc_pn_data_in <= {adc_pn_data_in[15:0], ~adc_data[15], adc_data[14:0]};
if (adc_pnseq_sel == 4'd0) begin
adc_pn_data_pn <= pn9(adc_pn_data_pn_s);
end else begin
adc_pn_data_pn <= pn23(adc_pn_data_pn_s);
if (adc_valid_in == 1'b1) begin
if (adc_pnseq_sel == 4'd0) begin
adc_pn_data_pn <= pn9(adc_pn_data_pn_s);
end else begin
adc_pn_data_pn <= pn23(adc_pn_data_pn_s);
end
end
end