From 05ed98f8841f90d724bd16fa69aee9ee4e253e91 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Tue, 11 Nov 2014 12:35:44 +0200 Subject: [PATCH] common: Updated common constratins for ac701, kc705, vc707, zc702 --- projects/common/ac701/ac701_system_constr.xdc | 15 --- projects/common/kc705/kc705_system_constr.xdc | 13 -- projects/common/vc707/vc707_system_constr.xdc | 12 -- projects/common/zc702/zc702_system_constr.xdc | 123 ++++++++---------- 4 files changed, 53 insertions(+), 110 deletions(-) diff --git a/projects/common/ac701/ac701_system_constr.xdc b/projects/common/ac701/ac701_system_constr.xdc index 797cca0c6..b192ff3b9 100644 --- a/projects/common/ac701/ac701_system_constr.xdc +++ b/projects/common/ac701/ac701_system_constr.xdc @@ -103,18 +103,3 @@ set_property -dict {PACKAGE_PIN V22 IOSTANDARD LVCMOS18} [get_ports hdmi_da # spdif set_property -dict {PACKAGE_PIN Y21 IOSTANDARD LVCMOS18} [get_ports spdif] - -# clocks - -create_clock -name cpu_clk -period 10.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_clk] -create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_addn_clk_0] -create_clock -name m125_clk -period 8.00 [get_pins i_system_wrapper/system_i/sys_ethernet_clkgen/clk_out1] -create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0] -create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] - -set_clock_groups -asynchronous -group {cpu_clk} -set_clock_groups -asynchronous -group {m200_clk} -set_clock_groups -asynchronous -group {m125_clk} -set_clock_groups -asynchronous -group {hdmi_clk} -set_clock_groups -asynchronous -group {spdif_clk} - diff --git a/projects/common/kc705/kc705_system_constr.xdc b/projects/common/kc705/kc705_system_constr.xdc index c7017e21c..3d360c605 100644 --- a/projects/common/kc705/kc705_system_constr.xdc +++ b/projects/common/kc705/kc705_system_constr.xdc @@ -123,16 +123,3 @@ set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25} [get_ports hdmi_da # spdif set_property -dict {PACKAGE_PIN J17 IOSTANDARD LVCMOS25} [get_ports spdif] - -# clocks - -create_clock -name cpu_clk -period 10.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_addn_clk_0] -create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_clk] -create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0] -create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] - -set_clock_groups -asynchronous -group {cpu_clk} -set_clock_groups -asynchronous -group {m200_clk} -set_clock_groups -asynchronous -group {hdmi_clk} -set_clock_groups -asynchronous -group {spdif_clk} - diff --git a/projects/common/vc707/vc707_system_constr.xdc b/projects/common/vc707/vc707_system_constr.xdc index 2491b2a80..9736f45b2 100644 --- a/projects/common/vc707/vc707_system_constr.xdc +++ b/projects/common/vc707/vc707_system_constr.xdc @@ -118,15 +118,3 @@ set_property -dict {PACKAGE_PIN AV23 IOSTANDARD LVCMOS18} [get_ports hdmi_da # spdif set_property -dict {PACKAGE_PIN AR23 IOSTANDARD LVCMOS18} [get_ports spdif] - -# clocks - -create_clock -name cpu_clk -period 10.00 [get_nets i_system_wrapper/system_i/axi_ddr_cntrl/ui_clk] -create_clock -name m200_clk -period 5.00 [get_nets i_system_wrapper/system_i/axi_ddr_cntrl/ui_addn_clk_0] -create_clock -name hdmi_clk -period 6.73 [get_nets i_system_wrapper/system_i/axi_hdmi_clkgen/inst/i_mmcm_drp/mmcm_clk_0_s] -create_clock -name spdif_clk -period 50.00 [get_nets i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] - -set_clock_groups -asynchronous -group {cpu_clk} -set_clock_groups -asynchronous -group {m200_clk} -set_clock_groups -asynchronous -group {hdmi_clk} -set_clock_groups -asynchronous -group {spdif_clk} diff --git a/projects/common/zc702/zc702_system_constr.xdc b/projects/common/zc702/zc702_system_constr.xdc index 7f56a7eac..fc7bac5b4 100644 --- a/projects/common/zc702/zc702_system_constr.xdc +++ b/projects/common/zc702/zc702_system_constr.xdc @@ -1,71 +1,54 @@ - -# constraints -# hdmi - -set_property -dict {PACKAGE_PIN L16 IOSTANDARD LVCMOS25} [get_ports hdmi_out_clk] -set_property -dict {PACKAGE_PIN H15 IOSTANDARD LVCMOS25} [get_ports hdmi_vsync] -set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS25} [get_ports hdmi_hsync] -set_property -dict {PACKAGE_PIN T18 IOSTANDARD LVCMOS25} [get_ports hdmi_data_e] -set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports hdmi_data[0]] -set_property -dict {PACKAGE_PIN AA21 IOSTANDARD LVCMOS25} [get_ports hdmi_data[1]] -set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS25} [get_ports hdmi_data[2]] -set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports hdmi_data[3]] -set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[4]] -set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports hdmi_data[5]] -set_property -dict {PACKAGE_PIN V20 IOSTANDARD LVCMOS25} [get_ports hdmi_data[6]] -set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS25} [get_ports hdmi_data[7]] -set_property -dict {PACKAGE_PIN W21 IOSTANDARD LVCMOS25} [get_ports hdmi_data[8]] -set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports hdmi_data[9]] -set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports hdmi_data[10]] -set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[11]] -set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[12]] -set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[13]] -set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports hdmi_data[14]] -set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports hdmi_data[15]] - -# spdif - -set_property -dict {PACKAGE_PIN R15 IOSTANDARD LVCMOS25} [get_ports spdif] - -# iic - -set_property -dict {PACKAGE_PIN W11 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_scl] -set_property -dict {PACKAGE_PIN W8 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_sda] - -# gpio (switches, leds and such) - -set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[0]] ; ## GPIO_SW_N -set_property -dict {PACKAGE_PIN F19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[1]] ; ## GPIO_SW_S -set_property -dict {PACKAGE_PIN W6 IOSTANDARD LVCMOS25} [get_ports gpio_bd[2]] ; ## GPIO_DIP_SW0 -set_property -dict {PACKAGE_PIN W7 IOSTANDARD LVCMOS25} [get_ports gpio_bd[3]] ; ## GPIO_DIP_SW1 - -set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[4]] ; ## PMOD2_3_LS -set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[5]] ; ## PMOD2_2_LS -set_property -dict {PACKAGE_PIN W10 IOSTANDARD LVCMOS25} [get_ports gpio_bd[6]] ; ## PMOD2_1_LS -set_property -dict {PACKAGE_PIN V7 IOSTANDARD LVCMOS25} [get_ports gpio_bd[7]] ; ## PMOD2_0_LS -set_property -dict {PACKAGE_PIN E15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[8]] ; ## PMOD1_0_LS -set_property -dict {PACKAGE_PIN D15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[9]] ; ## PMOD1_1_LS -set_property -dict {PACKAGE_PIN W17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[10]] ; ## PMOD1_2_LS -set_property -dict {PACKAGE_PIN W5 IOSTANDARD LVCMOS25} [get_ports gpio_bd[11]] ; ## PMOD1_3_LS - -set_property -dict {PACKAGE_PIN H17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[12]] ; ## XADC_GPIO_0 -set_property -dict {PACKAGE_PIN H22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[13]] ; ## XADC_GPIO_1 -set_property -dict {PACKAGE_PIN G22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[14]] ; ## XADC_GPIO_2 -set_property -dict {PACKAGE_PIN H18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[15]] ; ## XADC_GPIO_3 - -# clocks - -create_clock -name cpu_clk -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK0] -create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK1] -create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0] -create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1] - -create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]] -create_clock -name ps7_clk_1 -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]] -set_clock_groups -asynchronous -group {cpu_clk} -set_clock_groups -asynchronous -group {m200_clk} -set_clock_groups -asynchronous -group {hdmi_clk} -set_clock_groups -asynchronous -group {spdif_clk} -set_clock_groups -asynchronous -group {ps7_clk_0} -set_clock_groups -asynchronous -group {ps7_clk_1} +# constraints +# hdmi + +set_property -dict {PACKAGE_PIN L16 IOSTANDARD LVCMOS25} [get_ports hdmi_out_clk] +set_property -dict {PACKAGE_PIN H15 IOSTANDARD LVCMOS25} [get_ports hdmi_vsync] +set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS25} [get_ports hdmi_hsync] +set_property -dict {PACKAGE_PIN T18 IOSTANDARD LVCMOS25} [get_ports hdmi_data_e] +set_property -dict {PACKAGE_PIN AB21 IOSTANDARD LVCMOS25} [get_ports hdmi_data[0]] +set_property -dict {PACKAGE_PIN AA21 IOSTANDARD LVCMOS25} [get_ports hdmi_data[1]] +set_property -dict {PACKAGE_PIN AB22 IOSTANDARD LVCMOS25} [get_ports hdmi_data[2]] +set_property -dict {PACKAGE_PIN AA22 IOSTANDARD LVCMOS25} [get_ports hdmi_data[3]] +set_property -dict {PACKAGE_PIN V19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[4]] +set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports hdmi_data[5]] +set_property -dict {PACKAGE_PIN V20 IOSTANDARD LVCMOS25} [get_ports hdmi_data[6]] +set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS25} [get_ports hdmi_data[7]] +set_property -dict {PACKAGE_PIN W21 IOSTANDARD LVCMOS25} [get_ports hdmi_data[8]] +set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS25} [get_ports hdmi_data[9]] +set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports hdmi_data[10]] +set_property -dict {PACKAGE_PIN T19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[11]] +set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[12]] +set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS25} [get_ports hdmi_data[13]] +set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports hdmi_data[14]] +set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports hdmi_data[15]] + +# spdif + +set_property -dict {PACKAGE_PIN R15 IOSTANDARD LVCMOS25} [get_ports spdif] + +# iic + +set_property -dict {PACKAGE_PIN W11 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_scl] +set_property -dict {PACKAGE_PIN W8 IOSTANDARD LVCMOS25 PULLTYPE PULLUP} [get_ports iic_sda] + +# gpio (switches, leds and such) + +set_property -dict {PACKAGE_PIN G19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[0]] ; ## GPIO_SW_N +set_property -dict {PACKAGE_PIN F19 IOSTANDARD LVCMOS25} [get_ports gpio_bd[1]] ; ## GPIO_SW_S +set_property -dict {PACKAGE_PIN W6 IOSTANDARD LVCMOS25} [get_ports gpio_bd[2]] ; ## GPIO_DIP_SW0 +set_property -dict {PACKAGE_PIN W7 IOSTANDARD LVCMOS25} [get_ports gpio_bd[3]] ; ## GPIO_DIP_SW1 + +set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[4]] ; ## PMOD2_3_LS +set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[5]] ; ## PMOD2_2_LS +set_property -dict {PACKAGE_PIN W10 IOSTANDARD LVCMOS25} [get_ports gpio_bd[6]] ; ## PMOD2_1_LS +set_property -dict {PACKAGE_PIN V7 IOSTANDARD LVCMOS25} [get_ports gpio_bd[7]] ; ## PMOD2_0_LS +set_property -dict {PACKAGE_PIN E15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[8]] ; ## PMOD1_0_LS +set_property -dict {PACKAGE_PIN D15 IOSTANDARD LVCMOS25} [get_ports gpio_bd[9]] ; ## PMOD1_1_LS +set_property -dict {PACKAGE_PIN W17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[10]] ; ## PMOD1_2_LS +set_property -dict {PACKAGE_PIN W5 IOSTANDARD LVCMOS25} [get_ports gpio_bd[11]] ; ## PMOD1_3_LS + +set_property -dict {PACKAGE_PIN H17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[12]] ; ## XADC_GPIO_0 +set_property -dict {PACKAGE_PIN H22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[13]] ; ## XADC_GPIO_1 +set_property -dict {PACKAGE_PIN G22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[14]] ; ## XADC_GPIO_2 +set_property -dict {PACKAGE_PIN H18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[15]] ; ## XADC_GPIO_3