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common: Updated common constratins for ac701, kc705, vc707, zc702

main
Adrian Costina 2014-11-11 12:35:44 +02:00
parent c1268f089d
commit 05ed98f884
4 changed files with 53 additions and 110 deletions
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15
projects/common/ac701/ac701_system_constr.xdc
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@ -103,18 +103,3 @@ set_property -dict {PACKAGE_PIN V22 IOSTANDARD LVCMOS18} [get_ports hdmi_da
# spdif # spdif
set_property -dict {PACKAGE_PIN Y21 IOSTANDARD LVCMOS18} [get_ports spdif] set_property -dict {PACKAGE_PIN Y21 IOSTANDARD LVCMOS18} [get_ports spdif]
# clocks
create_clock -name cpu_clk -period 10.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_clk]
create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_addn_clk_0]
create_clock -name m125_clk -period 8.00 [get_pins i_system_wrapper/system_i/sys_ethernet_clkgen/clk_out1]
create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0]
create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1]
set_clock_groups -asynchronous -group {cpu_clk}
set_clock_groups -asynchronous -group {m200_clk}
set_clock_groups -asynchronous -group {m125_clk}
set_clock_groups -asynchronous -group {hdmi_clk}
set_clock_groups -asynchronous -group {spdif_clk}

13
projects/common/kc705/kc705_system_constr.xdc
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@ -123,16 +123,3 @@ set_property -dict {PACKAGE_PIN L18 IOSTANDARD LVCMOS25} [get_ports hdmi_da
# spdif # spdif
set_property -dict {PACKAGE_PIN J17 IOSTANDARD LVCMOS25} [get_ports spdif] set_property -dict {PACKAGE_PIN J17 IOSTANDARD LVCMOS25} [get_ports spdif]
# clocks
create_clock -name cpu_clk -period 10.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_addn_clk_0]
create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_i/axi_ddr_cntrl/ui_clk]
create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0]
create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1]
set_clock_groups -asynchronous -group {cpu_clk}
set_clock_groups -asynchronous -group {m200_clk}
set_clock_groups -asynchronous -group {hdmi_clk}
set_clock_groups -asynchronous -group {spdif_clk}

12
projects/common/vc707/vc707_system_constr.xdc
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@ -118,15 +118,3 @@ set_property -dict {PACKAGE_PIN AV23 IOSTANDARD LVCMOS18} [get_ports hdmi_da
# spdif # spdif
set_property -dict {PACKAGE_PIN AR23 IOSTANDARD LVCMOS18} [get_ports spdif] set_property -dict {PACKAGE_PIN AR23 IOSTANDARD LVCMOS18} [get_ports spdif]
# clocks
create_clock -name cpu_clk -period 10.00 [get_nets i_system_wrapper/system_i/axi_ddr_cntrl/ui_clk]
create_clock -name m200_clk -period 5.00 [get_nets i_system_wrapper/system_i/axi_ddr_cntrl/ui_addn_clk_0]
create_clock -name hdmi_clk -period 6.73 [get_nets i_system_wrapper/system_i/axi_hdmi_clkgen/inst/i_mmcm_drp/mmcm_clk_0_s]
create_clock -name spdif_clk -period 50.00 [get_nets i_system_wrapper/system_i/sys_audio_clkgen/clk_out1]
set_clock_groups -asynchronous -group {cpu_clk}
set_clock_groups -asynchronous -group {m200_clk}
set_clock_groups -asynchronous -group {hdmi_clk}
set_clock_groups -asynchronous -group {spdif_clk}

17
projects/common/zc702/zc702_system_constr.xdc
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@ -52,20 +52,3 @@ set_property -dict {PACKAGE_PIN H17 IOSTANDARD LVCMOS25} [get_ports gpio_bd[
set_property -dict {PACKAGE_PIN H22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[13]] ; ## XADC_GPIO_1 set_property -dict {PACKAGE_PIN H22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[13]] ; ## XADC_GPIO_1
set_property -dict {PACKAGE_PIN G22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[14]] ; ## XADC_GPIO_2 set_property -dict {PACKAGE_PIN G22 IOSTANDARD LVCMOS25} [get_ports gpio_bd[14]] ; ## XADC_GPIO_2
set_property -dict {PACKAGE_PIN H18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[15]] ; ## XADC_GPIO_3 set_property -dict {PACKAGE_PIN H18 IOSTANDARD LVCMOS25} [get_ports gpio_bd[15]] ; ## XADC_GPIO_3
# clocks
create_clock -name cpu_clk -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK0]
create_clock -name m200_clk -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/FCLK_CLK1]
create_clock -name hdmi_clk -period 6.73 [get_pins i_system_wrapper/system_i/axi_hdmi_clkgen/clk_0]
create_clock -name spdif_clk -period 50.00 [get_pins i_system_wrapper/system_i/sys_audio_clkgen/clk_out1]
create_clock -name ps7_clk_0 -period 10.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[0]]
create_clock -name ps7_clk_1 -period 5.00 [get_pins i_system_wrapper/system_i/sys_ps7/inst/PS7_i/FCLKCLK[1]]
set_clock_groups -asynchronous -group {cpu_clk}
set_clock_groups -asynchronous -group {m200_clk}
set_clock_groups -asynchronous -group {hdmi_clk}
set_clock_groups -asynchronous -group {spdif_clk}
set_clock_groups -asynchronous -group {ps7_clk_0}
set_clock_groups -asynchronous -group {ps7_clk_1}