usb_fx3: Switch PS7 UART to UARTLITE to communicate with the FX3 board

main
Adrian Costina 2016-07-28 15:21:38 +03:00
parent 6ebb32a194
commit 08f4ba24d5
2 changed files with 7 additions and 3 deletions

View File

@ -17,6 +17,9 @@ create_bd_port -dir O epswitch_n
set_property -dict [list CONFIG.PCW_UART0_PERIPHERAL_ENABLE {1}] $sys_ps7
set axi_uart [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_uartlite:2.0 axi_uart]
set_property -dict [list CONFIG.C_BAUDRATE {115200}] $axi_uart
set axi_usb_fx3 [create_bd_cell -type ip -vlnv analog.com:user:axi_usb_fx3:1.0 axi_usb_fx3]
set axi_usb_fx3_dma [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_dma:7.1 axi_usb_fx3_dma]
@ -28,8 +31,8 @@ set_property -dict [list CONFIG.c_sg_length_width {16}] $axi_usb_fx3_dma
ad_connect axi_usb_fx3_dma/S_AXIS_S2MM axi_usb_fx3/m_axis
ad_connect axi_usb_fx3/s_axis axi_usb_fx3_dma/M_AXIS_MM2S
ad_connect /sys_ps7/UART0_RX usb_fx3_uart_tx
ad_connect /sys_ps7/UART0_TX usb_fx3_uart_rx
ad_connect axi_uart/rx usb_fx3_uart_tx
ad_connect axi_uart/tx usb_fx3_uart_rx
ad_connect sys_cpu_clk axi_usb_fx3/s_axi_aclk
ad_connect sys_cpu_resetn axi_usb_fx3/s_axi_aresetn
@ -50,9 +53,11 @@ ad_connect axi_usb_fx3/epswitch_n epswitch_n
ad_cpu_interrupt ps-13 mb-12 axi_usb_fx3/irq
ad_cpu_interrupt ps-12 mb-13 axi_usb_fx3_dma/mm2s_introut
ad_cpu_interrupt ps-11 mb-14 axi_usb_fx3_dma/s2mm_introut
ad_cpu_interrupt ps-10 mb-15 axi_uart/interrupt
ad_cpu_interconnect 0x50000000 axi_usb_fx3
ad_cpu_interconnect 0x40400000 axi_usb_fx3_dma
ad_cpu_interconnect 0x40600000 axi_uart
ad_mem_hp1_interconnect sys_cpu_clk sys_ps7/S_AXI_HP1
ad_mem_hp1_interconnect sys_cpu_clk axi_usb_fx3_dma/M_AXI_SG
ad_mem_hp1_interconnect sys_cpu_clk axi_usb_fx3_dma/M_AXI_MM2S

View File

@ -226,7 +226,6 @@ module system_top (
.ps_intr_07 (1'b0),
.ps_intr_08 (1'b0),
.ps_intr_09 (1'b0),
.ps_intr_10 (1'b0),
.spdif (spdif));
endmodule