axi_ad9152: Clock ratio is indicating a sampling clock ratio
The software can use this data to calculate the effective sampling clock, independent of the interface type.main
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892755c084
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0b08250261
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@ -219,7 +219,7 @@ module axi_ad9152_core (
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.dac_status (1'b1),
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.dac_status (1'b1),
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.dac_status_ovf (dac_dovf),
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.dac_status_ovf (dac_dovf),
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.dac_status_unf (dac_dunf),
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.dac_status_unf (dac_dunf),
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.dac_clk_ratio (32'd40),
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.dac_clk_ratio (32'd4),
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.up_drp_sel (),
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.up_drp_sel (),
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.up_drp_wr (),
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.up_drp_wr (),
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.up_drp_addr (),
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.up_drp_addr (),
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