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daq2: Updated project with interrupts in IPI to work correctly in Linux

main
Adrian Costina 2015-03-18 13:49:11 +02:00
parent 1407bebb11
commit 0b25a337a2
5 changed files with 22 additions and 37 deletions
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31
projects/daq2/common/daq2_bd.tcl
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@ -69,11 +69,6 @@ if {$sys_zynq == 0} {
set adc_dsync [create_bd_port -dir I adc_dsync]
set adc_ddata [create_bd_port -dir I -from 127 -to 0 adc_ddata]
set axi_ad9144_dma_intr [create_bd_port -dir O axi_ad9144_dma_intr]
set axi_ad9680_dma_intr [create_bd_port -dir O axi_ad9680_dma_intr]
set axi_daq2_spi_intr [create_bd_port -dir O axi_daq2_spi_intr ]
set axi_daq2_gpio_intr [create_bd_port -dir O axi_daq2_gpio_intr ]
# dac peripherals
set axi_ad9144_core [create_bd_cell -type ip -vlnv analog.com:user:axi_ad9144:1.0 axi_ad9144_core]
@ -275,7 +270,6 @@ if {$sys_zynq == 0} {
connect_bd_net -net axi_ad9144_dac_drd [get_bd_ports dac_drd] [get_bd_pins axi_ad9144_dma/fifo_rd_en]
connect_bd_net -net axi_ad9144_dac_ddata [get_bd_ports dac_ddata] [get_bd_pins axi_ad9144_dma/fifo_rd_dout]
connect_bd_net -net axi_ad9144_dac_dunf [get_bd_pins axi_ad9144_core/dac_dunf] [get_bd_pins axi_ad9144_dma/fifo_rd_underflow]
connect_bd_net -net axi_ad9144_dma_intr [get_bd_pins axi_ad9144_dma/irq] [get_bd_ports axi_ad9144_dma_intr]
# connections (adc)
@ -315,7 +309,6 @@ if {$sys_zynq == 0} {
connect_bd_net -net axi_ad9680_dma_ddata [get_bd_pins axi_ad9680_fifo/dma_wdata] [get_bd_pins axi_ad9680_dma/s_axis_data]
connect_bd_net -net axi_ad9680_dma_dready [get_bd_pins axi_ad9680_fifo/dma_wready] [get_bd_pins axi_ad9680_dma/s_axis_ready]
connect_bd_net -net axi_ad9680_dma_xfer_req [get_bd_pins axi_ad9680_fifo/dma_xfer_req] [get_bd_pins axi_ad9680_dma/s_axis_xfer_req]
connect_bd_net -net axi_ad9680_dma_intr [get_bd_pins axi_ad9680_dma/irq] [get_bd_ports axi_ad9680_dma_intr]
# dac/adc clocks
@ -374,8 +367,28 @@ if {$sys_zynq == 0} {
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_daq2_spi/s_axi_aresetn]
connect_bd_net -net sys_100m_resetn [get_bd_pins axi_daq2_gpio/s_axi_aresetn]
connect_bd_net -net axi_daq2_spi_intr [get_bd_pins axi_daq2_spi/ip2intc_irpt] [get_bd_ports axi_daq2_spi_intr]
connect_bd_net -net axi_daq2_gpio_intr [get_bd_pins axi_daq2_gpio/ip2intc_irpt] [get_bd_ports axi_daq2_gpio_intr]
}
# interrupts
if {$sys_zynq == 0} {
delete_bd_objs [get_bd_nets mb_intr_10_s] [get_bd_ports mb_intr_10]
delete_bd_objs [get_bd_nets mb_intr_11_s] [get_bd_ports mb_intr_11]
delete_bd_objs [get_bd_nets mb_intr_12_s] [get_bd_ports mb_intr_12]
delete_bd_objs [get_bd_nets mb_intr_13_s] [get_bd_ports mb_intr_13]
connect_bd_net -net axi_daq2_spi_intr [get_bd_pins axi_daq2_spi/ip2intc_irpt] [get_bd_pins sys_concat_intc/In10]
connect_bd_net -net axi_daq2_gpio_intr [get_bd_pins axi_daq2_gpio/ip2intc_irpt] [get_bd_pins sys_concat_intc/In11]
connect_bd_net -net axi_ad9680_dma_intr [get_bd_pins axi_ad9680_dma/irq] [get_bd_pins sys_concat_intc/In12]
connect_bd_net -net axi_ad9144_dma_intr [get_bd_pins axi_ad9144_dma/irq] [get_bd_pins sys_concat_intc/In13]
} else {
delete_bd_objs [get_bd_nets ps_intr_12_s] [get_bd_ports ps_intr_12]
delete_bd_objs [get_bd_nets ps_intr_13_s] [get_bd_ports ps_intr_13]
connect_bd_net -net axi_ad9144_dma_intr [get_bd_pins axi_ad9144_dma/irq] [get_bd_pins sys_concat_intc/In12]
connect_bd_net -net axi_ad9680_dma_intr [get_bd_pins axi_ad9680_dma/irq] [get_bd_pins sys_concat_intc/In13]
}
# gt uses hp3, and 100MHz clock for both DRP and AXI4

8
projects/daq2/kc705/system_top.v
View File

@ -531,10 +531,6 @@ module system_top (
.hdmi_vsync (hdmi_vsync),
.iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda),
.mb_intr_10 (mb_intrs[10]),
.mb_intr_11 (mb_intrs[11]),
.mb_intr_12 (mb_intrs[12]),
.mb_intr_13 (mb_intrs[13]),
.mb_intr_14 (mb_intrs[14]),
.mb_intr_15 (mb_intrs[15]),
.mb_intr_16 (mb_intrs[16]),
@ -553,10 +549,6 @@ module system_top (
.mb_intr_29 (mb_intrs[29]),
.mb_intr_30 (mb_intrs[30]),
.mb_intr_31 (mb_intrs[31]),
.axi_ad9144_dma_intr (mb_intrs[13]),
.axi_ad9680_dma_intr (mb_intrs[12]),
.axi_daq2_gpio_intr (mb_intrs[11]),
.axi_daq2_spi_intr (mb_intrs[10]),
.iic_rstn (iic_rstn),
.mdio_mdc (mdio_mdc),
.mdio_mdio_io (mdio_mdio_io),

8
projects/daq2/kcu105/system_top.v
View File

@ -455,10 +455,6 @@ module system_top (
.adc_enable_1 (adc_enable_1),
.adc_valid_0 (adc_valid_0),
.adc_valid_1 (adc_valid_1),
.axi_ad9144_dma_intr (mb_intrs[13]),
.axi_ad9680_dma_intr (mb_intrs[12]),
.axi_daq2_gpio_intr (mb_intrs[11]),
.axi_daq2_spi_intr (mb_intrs[10]),
.c0_ddr4_act_n (ddr4_act_n),
.c0_ddr4_adr (ddr4_addr),
.c0_ddr4_ba (ddr4_ba),
@ -505,10 +501,6 @@ module system_top (
.hdmi_vsync (hdmi_vsync),
.iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda),
.mb_intr_10 (mb_intrs[10]),
.mb_intr_11 (mb_intrs[11]),
.mb_intr_12 (mb_intrs[12]),
.mb_intr_13 (mb_intrs[13]),
.mb_intr_14 (mb_intrs[14]),
.mb_intr_15 (mb_intrs[15]),
.mb_intr_16 (mb_intrs[16]),

8
projects/daq2/vc707/system_top.v
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@ -530,10 +530,6 @@ module system_top (
.iic_main_scl_io (iic_scl),
.iic_main_sda_io (iic_sda),
.iic_rstn (iic_rstn),
.mb_intr_10 (mb_intrs[10]),
.mb_intr_11 (mb_intrs[11]),
.mb_intr_12 (mb_intrs[12]),
.mb_intr_13 (mb_intrs[13]),
.mb_intr_14 (mb_intrs[14]),
.mb_intr_15 (mb_intrs[15]),
.mb_intr_16 (mb_intrs[16]),
@ -552,10 +548,6 @@ module system_top (
.mb_intr_29 (mb_intrs[29]),
.mb_intr_30 (mb_intrs[30]),
.mb_intr_31 (mb_intrs[31]),
.axi_ad9144_dma_intr (mb_intrs[13]),
.axi_ad9680_dma_intr (mb_intrs[12]),
.axi_daq2_gpio_intr (mb_intrs[11]),
.axi_daq2_spi_intr (mb_intrs[10]),
.rx_data_n (rx_data_n),
.rx_data_p (rx_data_p),
.rx_ref_clk (rx_ref_clk),

4
projects/daq2/zc706/system_top.v
View File

@ -528,8 +528,6 @@ module system_top (
.ps_intr_1 (ps_intrs[1]),
.ps_intr_10 (ps_intrs[10]),
.ps_intr_11 (ps_intrs[11]),
.ps_intr_12 (ps_intrs[12]),
.ps_intr_13 (ps_intrs[13]),
.ps_intr_2 (ps_intrs[2]),
.ps_intr_3 (ps_intrs[3]),
.ps_intr_4 (ps_intrs[4]),
@ -538,8 +536,6 @@ module system_top (
.ps_intr_7 (ps_intrs[7]),
.ps_intr_8 (ps_intrs[8]),
.ps_intr_9 (ps_intrs[9]),
.axi_ad9144_dma_intr (ps_intrs[12]),
.axi_ad9680_dma_intr (ps_intrs[13]),
.rx_data_n (rx_data_n),
.rx_data_p (rx_data_p),
.rx_ref_clk (rx_ref_clk),