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adrv9001/zcu102: Add TDD support

main
Laszlo Nagy 2020-08-24 11:35:44 +01:00 committed by Laszlo Nagy
parent afa3f11206
commit 0c2745361b
2 changed files with 63 additions and 28 deletions
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20
projects/adrv9001/common/adrv9001_bd.tcl
View File

@ -45,6 +45,16 @@ create_bd_port -dir O tx2_qdata_out_p
create_bd_port -dir O tx2_strobe_out_n create_bd_port -dir O tx2_strobe_out_n
create_bd_port -dir O tx2_strobe_out_p create_bd_port -dir O tx2_strobe_out_p
create_bd_port -dir O rx1_enable
create_bd_port -dir O rx2_enable
create_bd_port -dir O tx1_enable
create_bd_port -dir O tx2_enable
create_bd_port -dir I gpio_rx1_enable_in
create_bd_port -dir I gpio_rx2_enable_in
create_bd_port -dir I gpio_tx1_enable_in
create_bd_port -dir I gpio_tx2_enable_in
# adrv9001 # adrv9001
ad_ip_instance axi_adrv9001 axi_adrv9001 ad_ip_instance axi_adrv9001 axi_adrv9001
@ -179,6 +189,16 @@ ad_connect tx2_qdata_out_p axi_adrv9001/tx2_qdata_out_p_qdata3
ad_connect tx2_strobe_out_n axi_adrv9001/tx2_strobe_out_n_NC ad_connect tx2_strobe_out_n axi_adrv9001/tx2_strobe_out_n_NC
ad_connect tx2_strobe_out_p axi_adrv9001/tx2_strobe_out_p_strobe_out ad_connect tx2_strobe_out_p axi_adrv9001/tx2_strobe_out_p_strobe_out
ad_connect rx1_enable axi_adrv9001/rx1_enable
ad_connect rx2_enable axi_adrv9001/rx2_enable
ad_connect tx1_enable axi_adrv9001/tx1_enable
ad_connect tx2_enable axi_adrv9001/tx2_enable
ad_connect gpio_rx1_enable_in axi_adrv9001/gpio_rx1_enable_in
ad_connect gpio_rx2_enable_in axi_adrv9001/gpio_rx2_enable_in
ad_connect gpio_tx1_enable_in axi_adrv9001/gpio_tx1_enable_in
ad_connect gpio_tx2_enable_in axi_adrv9001/gpio_tx2_enable_in
# RX1_RX2 - CPACK - RX_DMA1 # RX1_RX2 - CPACK - RX_DMA1
ad_connect axi_adrv9001/adc_1_rst util_adc_1_pack/reset ad_connect axi_adrv9001/adc_1_rst util_adc_1_pack/reset
ad_connect axi_adrv9001/adc_1_valid_i0 util_adc_1_pack/fifo_wr_en ad_connect axi_adrv9001/adc_1_valid_i0 util_adc_1_pack/fifo_wr_en

71
projects/adrv9001/zcu102/system_top.v
View File

@ -78,7 +78,7 @@ module system_top (
input rx1_dclk_in_n, input rx1_dclk_in_n,
input rx1_dclk_in_p, input rx1_dclk_in_p,
inout rx1_enable, output rx1_enable,
input rx1_idata_in_n, input rx1_idata_in_n,
input rx1_idata_in_p, input rx1_idata_in_p,
input rx1_qdata_in_n, input rx1_qdata_in_n,
@ -88,7 +88,7 @@ module system_top (
input rx2_dclk_in_n, input rx2_dclk_in_n,
input rx2_dclk_in_p, input rx2_dclk_in_p,
inout rx2_enable, output rx2_enable,
input rx2_idata_in_n, input rx2_idata_in_n,
input rx2_idata_in_p, input rx2_idata_in_p,
input rx2_qdata_in_n, input rx2_qdata_in_n,
@ -100,7 +100,7 @@ module system_top (
output tx1_dclk_out_p, output tx1_dclk_out_p,
input tx1_dclk_in_n, input tx1_dclk_in_n,
input tx1_dclk_in_p, input tx1_dclk_in_p,
inout tx1_enable, output tx1_enable,
output tx1_idata_out_n, output tx1_idata_out_n,
output tx1_idata_out_p, output tx1_idata_out_p,
output tx1_qdata_out_n, output tx1_qdata_out_n,
@ -112,7 +112,7 @@ module system_top (
output tx2_dclk_out_p, output tx2_dclk_out_p,
input tx2_dclk_in_n, input tx2_dclk_in_n,
input tx2_dclk_in_p, input tx2_dclk_in_p,
inout tx2_enable, output tx2_enable,
output tx2_idata_out_n, output tx2_idata_out_n,
output tx2_idata_out_p, output tx2_idata_out_p,
output tx2_qdata_out_n, output tx2_qdata_out_n,
@ -132,6 +132,10 @@ module system_top (
wire [94:0] gpio_i; wire [94:0] gpio_i;
wire [94:0] gpio_o; wire [94:0] gpio_o;
wire [94:0] gpio_t; wire [94:0] gpio_t;
wire gpio_rx1_enable_in;
wire gpio_rx2_enable_in;
wire gpio_tx1_enable_in;
wire gpio_tx2_enable_in;
wire [ 2:0] spi_csn; wire [ 2:0] spi_csn;
wire fpga_ref_clk; wire fpga_ref_clk;
@ -167,36 +171,37 @@ module system_top (
assign platform_status = vadj_err; assign platform_status = vadj_err;
ad_iobuf #(.DATA_WIDTH(20)) i_iobuf ( ad_iobuf #(.DATA_WIDTH(16)) i_iobuf (
.dio_t ({gpio_t[51:32]}), .dio_t ({gpio_t[47:32]}),
.dio_i ({gpio_o[51:32]}), .dio_i ({gpio_o[47:32]}),
.dio_o ({gpio_i[51:32]}), .dio_o ({gpio_i[47:32]}),
.dio_p ({tx2_enable, .dio_p ({sm_fan_tach, // 47
tx1_enable, reset_trx, // 46
rx2_enable, mode, // 45
rx1_enable, gp_int, // 44
sm_fan_tach, dgpio_11, // 43
reset_trx, dgpio_10, // 42
mode, dgpio_9, // 41
gp_int, dgpio_8, // 40
dgpio_11, dgpio_7, // 39
dgpio_10, dgpio_6, // 38
dgpio_9, dgpio_5, // 37
dgpio_8, dgpio_4, // 36
dgpio_7, dgpio_3, // 35
dgpio_6, dgpio_2, // 34
dgpio_5, dgpio_1, // 33
dgpio_4,
dgpio_3,
dgpio_2,
dgpio_1,
dgpio_0 })); // 32 dgpio_0 })); // 32
assign gpio_rx1_enable_in = gpio_o[48];
assign gpio_rx2_enable_in = gpio_o[49];
assign gpio_tx1_enable_in = gpio_o[50];
assign gpio_tx2_enable_in = gpio_o[51];
assign gpio_i[ 7: 0] = gpio_o[ 7: 0]; assign gpio_i[ 7: 0] = gpio_o[ 7: 0];
assign gpio_i[20: 8] = gpio_bd_i; assign gpio_i[20: 8] = gpio_bd_i;
assign gpio_bd_o = gpio_o[ 7: 0]; assign gpio_bd_o = gpio_o[ 7: 0];
assign gpio_i[54:52] = gpio_o[54:52]; assign gpio_i[54:48] = gpio_o[54:48];
assign gpio_i[55] = vadj_err; assign gpio_i[55] = vadj_err;
assign gpio_i[94:56] = gpio_o[94:56]; assign gpio_i[94:56] = gpio_o[94:56];
assign gpio_i[31:21] = gpio_o[31:21]; assign gpio_i[31:21] = gpio_o[31:21];
@ -249,6 +254,16 @@ module system_top (
.tx2_strobe_out_n (tx2_strobe_out_n), .tx2_strobe_out_n (tx2_strobe_out_n),
.tx2_strobe_out_p (tx2_strobe_out_p), .tx2_strobe_out_p (tx2_strobe_out_p),
.rx1_enable (rx1_enable),
.rx2_enable (rx2_enable),
.tx1_enable (tx1_enable),
.tx2_enable (tx2_enable),
.gpio_rx1_enable_in (gpio_rx1_enable_in),
.gpio_rx2_enable_in (gpio_rx2_enable_in),
.gpio_tx1_enable_in (gpio_tx1_enable_in),
.gpio_tx2_enable_in (gpio_tx2_enable_in),
.gpio_i (gpio_i), .gpio_i (gpio_i),
.gpio_o (gpio_o), .gpio_o (gpio_o),
.gpio_t (gpio_t), .gpio_t (gpio_t),