docs: Add cn0561 doc (#1245)
* docs: Add cn0561 doc. Update by guidelines Signed-off-by: laurent-19 <laurentiu.popa@analog.com> --------- Signed-off-by: laurent-19 <laurentiu.popa@analog.com>main
laurent-19
GitHub
parent
e1dd6e5d56
commit
0c3b8a1069
|
|
@ -29,6 +29,7 @@ HDL Reference Designs
|
||||||
AD9434-FMC <projects/ad9434_fmc/index>
|
AD9434-FMC <projects/ad9434_fmc/index>
|
||||||
AD9783-EBZ <projects/ad9783_ebz/index>
|
AD9783-EBZ <projects/ad9783_ebz/index>
|
||||||
ADAQ7980-SDZ <projects/adaq7980_sdz/index>
|
ADAQ7980-SDZ <projects/adaq7980_sdz/index>
|
||||||
|
CN0561 <projects/cn0561/index>
|
||||||
|
|
||||||
.. role:: red
|
.. role:: red
|
||||||
.. role:: green
|
.. role:: green
|
||||||
|
|
|
||||||
File diff suppressed because it is too large
Load Diff
|
After Width: | Height: | Size: 96 KiB |
|
|
@ -0,0 +1,286 @@
|
||||||
|
.. _cn0561:
|
||||||
|
|
||||||
|
CN0561 HDL project
|
||||||
|
===============================================================================
|
||||||
|
|
||||||
|
Overview
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
The :adi:`AD4134` is a quad channel, low noise, simultaneous sampling,
|
||||||
|
precision analog-to-digital converter (ADC), based on the continuous time
|
||||||
|
sigma-delta (CTSD) modulation scheme. This architecture inherently rejects
|
||||||
|
signals around the ADC aliasing frequency band, giving the device its inherent
|
||||||
|
antialiasing capability, and removesthe need for a complex external
|
||||||
|
antialiasing filter.
|
||||||
|
|
||||||
|
This device has four independent converter channels in parallel, each with a
|
||||||
|
CTSD modulator and a digital decimation and filtering path. It enables
|
||||||
|
simultaneous sampling of four signal sources, with a maximum input bandwidth
|
||||||
|
of 391.5 kHz. It supports a wide range of ODR frequencies, from 0.01 kSPS to
|
||||||
|
1496 kSPS wih less than 0.01 SPS adjustment resolution, allowing the user to
|
||||||
|
granularly vary sampling speed to achieve coherent sampling.
|
||||||
|
|
||||||
|
The :adi:`AD4134` supports two device configuration schemes: serial peripheral
|
||||||
|
interface (SPI) and hardware pin configuration (pin control mode).
|
||||||
|
The SPI control mode offers access to all the features and configuration
|
||||||
|
options available on the chip. Pin control mode offers the benefit of
|
||||||
|
simplifying the device configuration, enabling the device to operate
|
||||||
|
autonomously after power-up operating in a standalone mode.
|
||||||
|
|
||||||
|
The HDL reference design for the EVAL-CN0561 provides all the interfaces that
|
||||||
|
are necessary to interact with the device using a Xilinx FPGA development
|
||||||
|
board; to acquire data from the ADC device, supporting continuous data
|
||||||
|
capture at maximum 1.5 MSPS data rate. However, due to a hardware limitation,
|
||||||
|
the Cora-Z7s variant will only support a maximum data clock of 24MHz,
|
||||||
|
in contrast with 48MHz supported on the Zedboard.
|
||||||
|
|
||||||
|
Supported boards
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
- :adi:`EVAL-CN0561 <EVAL-CN0561>`
|
||||||
|
|
||||||
|
Supported devices
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
- :adi:`AD4134`
|
||||||
|
|
||||||
|
Supported carriers
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
- :xilinx:`ZedBoard <products/boards-and-kits/1-8dyf-11.html>` on FMC slot
|
||||||
|
- :xilinx:`Cora Z7-07S <https://digilent.com/shop/cora-z7-zynq-7000-single-core-for-arm-fpga-soc-development/>` on Arduino type headers
|
||||||
|
- `DE10-Nano <https://www.intel.com/content/www/us/en/developer/topic-technology/edge-5g/hardware/fpga-de10-nano.html>`__ on Arduino type headers
|
||||||
|
|
||||||
|
Block design
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
The reference design uses the SPI Engine Framework to interface with
|
||||||
|
the AD4134 ADC and only supports the slave mode with both DCLK and ODR
|
||||||
|
generated by the FPGA. The device sends data on the 4 DIN bits.
|
||||||
|
|
||||||
|
Block diagram
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
The data path and clock domains are depicted in the below diagrams:
|
||||||
|
|
||||||
|
.. image:: cn0561_hdl.svg
|
||||||
|
:width: 800
|
||||||
|
:align: center
|
||||||
|
:alt: CN0561/ZED/Cora Z7-07S block diagram *
|
||||||
|
|
||||||
|
.. admonition:: Legend
|
||||||
|
:class: note
|
||||||
|
|
||||||
|
``*`` The block design for Cora Z7-07S remains the same, the only
|
||||||
|
difference is the data clock frequency of 24MHz.
|
||||||
|
|
||||||
|
Jumper setup
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
.. list-table::
|
||||||
|
:widths: 15 5 45
|
||||||
|
:header-rows: 1
|
||||||
|
|
||||||
|
* - Jumper/Solder link
|
||||||
|
- Position
|
||||||
|
- Description
|
||||||
|
* - P10
|
||||||
|
- Mounted
|
||||||
|
- MODE (Slave) and DEC0/DCLKIO (DCLK Input)
|
||||||
|
* - P13
|
||||||
|
- 1-2
|
||||||
|
- Current sources and fault protection powered from board ±15V sources
|
||||||
|
* - P15
|
||||||
|
- 1-2
|
||||||
|
- Current sources and fault protection powered from board ±15V sources
|
||||||
|
|
||||||
|
CPU/Memory interconnects addresses
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
The addresses are dependent on the architecture of the FPGA, having an offset
|
||||||
|
added to the base address from HDL(see more at :ref:`architecture`).
|
||||||
|
|
||||||
|
======================== ===========
|
||||||
|
Instance Address
|
||||||
|
======================== ===========
|
||||||
|
spi_cn0561_axi_regmap 0x44A0_0000
|
||||||
|
axi_cn0561_dma 0x44A3_0000
|
||||||
|
odr_generator 0x44B0_0000
|
||||||
|
axi_cn0561_clkgen 0x44B1_0000
|
||||||
|
======================== ===========
|
||||||
|
|
||||||
|
SPI connections
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
.. list-table::
|
||||||
|
:widths: 25 25 25 25
|
||||||
|
:header-rows: 1
|
||||||
|
|
||||||
|
* - SPI type
|
||||||
|
- SPI manager instance
|
||||||
|
- SPI subordinate
|
||||||
|
- CS
|
||||||
|
* - PS
|
||||||
|
- SPI 0
|
||||||
|
- AD4134
|
||||||
|
- 0
|
||||||
|
|
||||||
|
GPIOs
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
The Software GPIO number is calculated as follows:
|
||||||
|
|
||||||
|
- Zynq-7000: if PS7 is used, then offset is 54
|
||||||
|
|
||||||
|
.. list-table::
|
||||||
|
:widths: 25 25 25 25
|
||||||
|
:header-rows: 2
|
||||||
|
|
||||||
|
* - GPIO signal
|
||||||
|
- Direction
|
||||||
|
- HDL GPIO EMIO
|
||||||
|
- Software GPIO
|
||||||
|
* -
|
||||||
|
- (from FPGA view)
|
||||||
|
-
|
||||||
|
- Zynq-7000
|
||||||
|
* - cn0561_gpio[7:4]
|
||||||
|
- INOUT
|
||||||
|
- 42:39
|
||||||
|
- 96:93
|
||||||
|
* - cn0561_gpio[2:0]
|
||||||
|
- INOUT
|
||||||
|
- 38:36
|
||||||
|
- 92:90
|
||||||
|
* - cn0561_pinbspi
|
||||||
|
- INOUT
|
||||||
|
- 35
|
||||||
|
- 89
|
||||||
|
* - cn0561_mode
|
||||||
|
- INOUT
|
||||||
|
- 34
|
||||||
|
- 88
|
||||||
|
* - cn0561_pdn
|
||||||
|
- INOUT
|
||||||
|
- 33
|
||||||
|
- 87
|
||||||
|
* - cn0561_resetn
|
||||||
|
- INOUT
|
||||||
|
- 32
|
||||||
|
- 86
|
||||||
|
|
||||||
|
Interrupts
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
Below are the Programmable Logic interrupts used in this project.
|
||||||
|
|
||||||
|
=============== === ========== ===========
|
||||||
|
Instance name HDL Linux Zynq Actual Zynq
|
||||||
|
=============== === ========== ===========
|
||||||
|
axi_cn0561_dma 13 57 89
|
||||||
|
spi_cn0561 12 56 88
|
||||||
|
=============== === ========== ===========
|
||||||
|
|
||||||
|
Building the HDL project
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
The design is built upon ADI's generic HDL reference design framework.
|
||||||
|
ADI does not distribute the bit/elf files of these projects so they
|
||||||
|
must be built from the sources available :git-hdl:`here </>`. To get
|
||||||
|
the source you must
|
||||||
|
`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository>`__
|
||||||
|
the HDL repository, and then build the project as follows:.
|
||||||
|
|
||||||
|
**Linux/Cygwin/WSL**
|
||||||
|
|
||||||
|
.. code-block::
|
||||||
|
:linenos:
|
||||||
|
|
||||||
|
user@analog:~$ cd hdl/projects/cn0561/zed
|
||||||
|
user@analog:~/hdl/projects/cn0561/zed$ make
|
||||||
|
|
||||||
|
A more comprehensive build guide can be found in the :ref:`build_hdl`
|
||||||
|
user guide.
|
||||||
|
|
||||||
|
Resources
|
||||||
|
-------------------------------------------------------------------------------
|
||||||
|
|
||||||
|
Hardware related
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
- Product datasheet: :adi:`AD4134`
|
||||||
|
|
||||||
|
HDL related
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
- :git-hdl:`CN0561 HDL project source code <projects/cn0561>`
|
||||||
|
|
||||||
|
.. list-table::
|
||||||
|
:widths: 30 35 35
|
||||||
|
:header-rows: 1
|
||||||
|
|
||||||
|
* - IP name
|
||||||
|
- Source code link
|
||||||
|
- Documentation link
|
||||||
|
* - AXI_CLKGEN
|
||||||
|
- :git-hdl:`library/axi_clkgen`
|
||||||
|
- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_clkgen>`
|
||||||
|
* - AXI_DMAC
|
||||||
|
- :git-hdl:`library/axi_dmac`
|
||||||
|
- :ref:`here <axi_dmac>`
|
||||||
|
* - AXI_HDMI_TX **
|
||||||
|
- :git-hdl:`library/axi_hdmi_tx`
|
||||||
|
- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_hdmi_tx>`
|
||||||
|
* - AXI_I2S_ADI *
|
||||||
|
- :git-hdl:`library/axi_i2s_adi`
|
||||||
|
- ---
|
||||||
|
* - AXI_PWM_GEN
|
||||||
|
- :git-hdl:`library/axi_pwm_gen`
|
||||||
|
- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_pwm_gen>`
|
||||||
|
* - AXI_SDDIF_TX *
|
||||||
|
- :git-hdl:`library/axi_spdif_tx`
|
||||||
|
- ---
|
||||||
|
* - AXI_SYSID
|
||||||
|
- :git-hdl:`library/axi_sysid`
|
||||||
|
- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
|
||||||
|
* - AXI_SPI_ENGINE
|
||||||
|
- :git-hdl:`library/spi_engine/axi_spi_engine`
|
||||||
|
- :ref:`here <spi_engine axi>`
|
||||||
|
* - SPI_ENGINE_EXECUTION
|
||||||
|
- :git-hdl:`library/spi_engine/spi_engine_execution`
|
||||||
|
- :ref:`here <spi_engine execution>`
|
||||||
|
* - SPI_ENGINE_INTERCONNECT
|
||||||
|
- :git-hdl:`library/spi_engine/spi_engine_interconnect`
|
||||||
|
- :ref:`here <spi_engine interconnect>`
|
||||||
|
* - SPI_ENGINE_OFFLOAD
|
||||||
|
- :git-hdl:`library/spi_engine/spi_engine_offload`
|
||||||
|
- :ref:`here <spi_engine offload>`
|
||||||
|
* - AXI_SYSID_ROM
|
||||||
|
- :git-hdl:`library/sysid_rom`
|
||||||
|
- :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`
|
||||||
|
* - UTIL_I2C_MIXER *
|
||||||
|
- :git-hdl:`library/util_i2c_mixer`
|
||||||
|
- ---
|
||||||
|
|
||||||
|
.. admonition:: Legend
|
||||||
|
:class: note
|
||||||
|
|
||||||
|
- ``*`` instantiated only for Zed carrier
|
||||||
|
- ``**`` instantiated only for Zed and De10Nano carriers
|
||||||
|
|
||||||
|
- :ref:`SPI Engine Framework documentation <spi_engine>`
|
||||||
|
|
||||||
|
Software related
|
||||||
|
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|
||||||
|
|
||||||
|
- :git-no-os:`CN0561 No-OS project source code <projects/cn0561>`
|
||||||
|
|
||||||
|
- :git-no-os:`AD4134/AD7134 No-OS Driver source code <drivers/adc/ad713x>`
|
||||||
|
|
||||||
|
- :dokuwiki:`AD4134/AD7134 No-OS Driver documentation <resources/tools-software/uc-drivers/ad713x>`
|
||||||
|
|
||||||
|
- :dokuwiki:`How to build No-OS <resources/no-os/build>`
|
||||||
|
|
||||||
|
.. include:: ../common/more_information.rst
|
||||||
|
|
||||||
|
.. include:: ../common/support.rst
|
||||||
Loading…
Reference in New Issue